SPIE 2026: Intel/Synopsys reveal ongoing EUV yield challenge

[Fred Chen]

From the abstract:

Buried multilayer (ML) defects in EUV masks continue to pose a significant challenge to imaging fidelity and yield in 0.33 NA EUV lithography.

However, it's only going to get worse with High-NA, which collects more light from smaller defects.

https://www.spiedigitallibrary.org/conference-proceedings-of-spie/13980/139800I/Rigorous-modeling-and-repair-of-EUV-multilayer-defects/10.1117/12.3095755.short

 

[OneEng]

From the abstract:

Buried multilayer (ML) defects in EUV masks continue to pose a significant challenge to imaging fidelity and yield in 0.33 NA EUV lithography.

However, it's only going to get worse with High-NA, which collects more light from smaller defects.

https://www.spiedigitallibrary.org/conference-proceedings-of-spie/13980/139800I/Rigorous-modeling-and-repair-of-EUV-multilayer-defects/10.1117/12.3095755.short

It's a good thing those High NA machines are so cost effective .

I have been wondering the same thing. As processes add MORE passes, layers and riskier passes at that, any increase in defect rate is going to have an oversized impact on yields ... its just simple math.

I think Intel is still remembering what a disaster it was for them waiting to move to EUV in the first place. This corporate memory is unfortunately leading them to take insane risks with new processes and new equipment IMO.

It's kinda like betting high risk at a casino. Betting on a single number on the roulette wheel gets you a huge payoff ..... but how many times do you loose before that big payout?

I also think that Intel needs to start considering what things cost and what the ROI is (and if they have the cash flow to support it). I think they are used to having more money than GOD .