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    by Published on 04-20-2018 10:00 AM
    1. Categories:
    2. Semiconductor Services,
    3. Semiconductor Advisors
    Article: TSMC Apple Rumors Debunked!-asml-euv-2010.jpg

    ASML put up good results with revenues of Euro2.285B versus street of Euro2.22B and EPS of Euro1.26 versus street of Euro1.17. Guide is for Euro2.55B versus street of Euro2.46B but EPS of Euro1.16 versus street EPS of Euro1.35 on lower gross margins, slipping from 48% to 43%.

    A couple of EUV systems ...
    by Published on 04-20-2018 05:00 AM
    1. Categories:
    2. Semiconductor Design,
    3. Intento Design
    Article: Audio/Voice DSP IP core: the next road to billion unit shipment-fig1.jpg

    Intento Design builds responsive analog EDA. The ID-XploreTM tool is used for analog design acceleration and technology porting at the functional level, helping companies move analog IP quickly between technology nodes and across business units. The Intention viewTM is a simple, elegant, and powerful concept that gives the speed of digital design to the analog designer for the first time. Intento Design receives a lot of questions on how the Intention view was conceived and how it works.

    The following ...
    by Published on 04-19-2018 10:00 AM
    1. Categories:
    2. Security

    It has taken the U.S. 16 years to enact Data Breach laws in each state. California led the way, with the first, in 2002 to protect its citizens. Last in line was Alabama, which just signed their law in March 2018. There is no overarching consistent data breach law at the federal level. It is all handled ...
    by Published on 04-19-2018 05:00 AM
    1. Categories:
    2. Semiconductor Services,
    3. Oski Technology
    Article: TSMC Apple Rumors Debunked!-spectre-meltdown-min.jpg

    Once again Oski delivered in their most recent Decoding Formal session, kicking off with a talk on the infamous Meltdown and Spectre bugs and possible relevance of formal methods in finding these and related problems. So far I haven’t invested much effort in understanding these ...
    by Published on 04-18-2018 10:00 AM
    1. Categories:
    2. Semiconductor Design,
    3. FPGA,
    4. Aldec
    What Keeps the executives of Semiconductor awake at night?-caption.jpg

    In a post-silicon bringup, it is customary to bring the design into a known state prior to applying further testing sequences. This is achieved through a Power-on-Reset (POR) or similar reset strategy which translates to initializing all the storage elements to a known state.

    During design implementation, varying ...
    by Published on 04-18-2018 05:00 AM
    1. Categories:
    2. Semiconductor Design,
    3. Semiconductor IP,
    4. NetSpeed Systems,
    5. Artificial Intelligence
    Article: Apple's Next Threat-ai-changing-computing.jpg

    Artificial Intelligence based systems are driving a metamorphosis in computing, and consequently precipitating a large shift in SOC design. AI training is often done in the cloud and has requirements for handling huge amounts of data with forward and backward data connections. Inference ...
    by Published on 04-17-2018 10:00 AM
    1. Categories:
    2. Semiconductor IP,
    3. Cadence,
    4. Artificial Intelligence
    EDA Consortium, Q3 2012 Revenue Numbers-camera-processing-pipeline.jpg

    Cadence has launched the new Tensilica Vision Q6 DSP IP, delivering 1.5x more performance than the former Vision P6 DSP IP and 1.25X better power efficiency. According with Cadence, the mobile industry is moving from traditional feature-based embedded vision to AI-based algorithm, even if all use cases still have mix of vision and AI operations. The result is need for both vision and AI processing in the camera pipeline, translating into ...
    by Published on 04-17-2018 05:00 AM
    1. Categories:
    2. Semiconductor Design,
    3. Synopsys,
    4. Events,
    5. Automotive
    Want to learn 20 nm layout techniques!-functional-safety-process-min.jpg

    ISO 26262 is serious stuff, the governing process behind automotive safety. But, as I have observed before, it doesn’t make for light reading. The standard is all about process and V-diagrams, mountains of documentation and accredited experts. I wouldn’t trade a word of ...
    by Published on 04-16-2018 10:00 AM
    1. Categories:
    2. Semiconductor Manufacturers,
    3. Samsung Foundry
    Hardware trojan: future prospects-iss-2018-20180112.jpg

    There is a report in the Seoul Economic Daily that Samsung has completed development of their 7nm process using EUV and that production will begin in June. What is claimed in the report is:
    • The process is installed in the Hwaseong S3 Fab
    • Samsung has more than 10 EUV systems installed
    • Production starts in June with Qualcomm,
    by Published on 04-16-2018 05:00 AM
    1. Categories:
    2. Semiconductor Design,
    3. Events
    Article: Online Schematic Capture and SPICE Circuit Simulation-4r1a0221.jpg

    The funniest line of the EDA CEO Outlook event was that we should rename our Amazon Echos Wally. Yes Wally is that smart and he remembers pretty much everything. I wish I could rename my Echo Wally because my daughter in-law is named Alexa ...

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