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Intel will probably need fewer units, but the challenges of cost and throughput may not be any less—if not greater. For example...
Thursday at 9:49 AM
S
One other important consideration for high NA is stitching. I don't think Intel can skirt around it. The High-NA scanner's throughput...
Thursday at 9:48 AM
S
FYI: I was told privately by a trusted source that these numbers are not correct. The correct numbers are under strict NDA which I will...
Thursday at 9:37 AM
F
One other important consideration for high NA is stitching. I don't think Intel can skirt around it. The High-NA scanner's throughput...
Thursday at 9:26 AM
F
TSMC notes from SPIE:
High-NA EUV remains challenged in yield as stochastic defect makes high-NA EUV linewidth roughness even harder to...
Thursday at 9:20 AM
FYI: I was told privately by a trusted source that these numbers are not correct. The correct numbers are under strict NDA which I will...
Thursday at 9:16 AM
TSMC notes from SPIE:
High-NA EUV remains challenged in yield as stochastic defect makes high-NA EUV linewidth roughness even harder to...
Thursday at 9:14 AM
F
21 nm pitch
Thursday at 9:05 AM
I
So it's deceptive to post it as if it shows a usability comparison between high-NA and SALELE low-NA, because it would lead people to...
Thursday at 8:59 AM
F
It was a measure of confidence against "variability risk", the "variability" not being stochastics, but process steps, e.g., overlay...
Thursday at 8:54 AM
I
So in that case 20nm-24nm is not "green" for high-NA, contrary to what the slide suggests?
Thursday at 8:49 AM
F
Intel had the tool since 2024 and i doubt Intel is dumb enough to do 10nm again they won't survive another 10nm...
Thursday at 8:48 AM
F
So I went through the whole presentation just now. I am not sure why only one slide was posted originally by someone to make some...
Thursday at 8:44 AM
I
oops my bad i misread that
Thursday at 8:41 AM
S
oops my bad i misread that
Thursday at 8:40 AM