To what extent lowpower design techniques reduce design cycle?

[nitinthapliyal]

In the initials of design development cycle, parallel to the functional verification activity. Designers use various techniques to identify the optimization in power, area, timing etc using various tools. After reaching to initial findings about power estimated for the design, they add additional circuitry recommended by EDA tools and do the layout. Now do they again calculate all the parameters (clock,timing,power,area) and go back again if there parameters doesnot meet the requirement and do the calculation about the same and do clean-up for the not-essential circuitry. Questions are:

1. if this is so than what kind of rework generally done for power-otimization especially?
2. if these parameters are inter-linked than how the things than handled?
3. clean-up done for recommended logic circuitry in the design hinder/change the power behaviour, if yes than to what extent?
4. what is the general tolerence factor kept for the lowpower design?

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[Daniel Payne]

The EDA companies have agreed on a Unified Power Format (UPF) in their tool flows that allows a user to focus on low power techniques throughout their design process.

There are even EDA companies that focus on optimizing for low power, like Apache (now part of Ansys) with Power Artist.

Low power is optimized at the RTL, gate and even transistor levels (choosing different transistor thresholds).

This is a broad topic area for IC designers today.

You may benefit from attending a webinar to get an overview.

 

[Daniel Payne]

FYI, Paul just blogged about an article in the New York Times on low power challenges.

 

[nitinthapliyal]

Thanks. I have checked the "Dark Silicon and the End of Multicore Scaling" referred in above mentioned article but doesnot answer of querries.

 

[Davaliao]

lm358 design technique

Utilizing the circuit designs perfected for recently introduced Quad
Operational Amplifiers, these dual operational amplifiers feature 1) low
power drain, 2) a common mode input voltage range extending to
ground/VEE, 3) single supply or split supply operation and 4) pinouts
compatible with the popular MC1558 dual operational amplifier. The LM158
series is equivalent to one–half of an LM124.
These amplifiers have several distinct advantages over standard
operational amplifier types in single supply applications. They can operate at
supply voltages as low as 3.0 V or as high as 32 V, with quiescent currents
about one–fifth of those associated with the MC1741 (on a per amplifier
basis). The common mode input range includes the negative supply, thereby
eliminating the necessity for external biasing components in many
applications. The output voltage range also includes the negative power
supply voltage.
• Short Circuit Protected Outputs
• True Differential Input Stage
• Single Supply Operation: 3.0 V to 32 V
• Low Input Bias Currents
• Internally Compensated
• Common Mode Range Extends to Negative Supply
• Single and Split Supply Operation
• Similar Performance to the Popular MC1558
• ESD Clamps on the Inputs Increase Ruggedness of the Device without
Affecting Operation

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