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It's confirmed 10 nm will proceed without EUV. 7 nm schedule is TBD (2019 target), since "each process is unique". Intel seems to have also tacitly admitted purchasing the 15 tools, as it was trying to target 7 nm for inserting EUV (in the Seeking Alpha transcript). They were not even sure 2 years would be enough for that to happen even. In that case, it looks like for the time being Intel is no longer able to use tick-tock to drive Moore's law.
I just read the INTC conference call transcript and I was not impressed at all. One of the Seeking Alpha bloggers called Intel the BlackBerry of Semiconductors which I thought was quite funny. I generally laugh the most at things that have truth in them and I laughed hard at this one. I was an early BlackBerry adopter and kept mine until the iPhone 4. One month later I knew BlackBerry was doomed.
Intel 14nm SoCs will be out one year later than the Samsung 14nm Exynous? In fact Samsung is supposed to have a 10nm version of Exynous out next year. Where is Intel Foundry? Intel IoT is the renamed embedded group. The only growth there will be through acquisitions and at what margins?
The new "Tick Tock" in town......
We think Intel's 2 year Moore's Law & Tick Tock cadence has driven the industry for more than 30 years but is now being replaced by a new Tick Tock cadence from Apple.
In the new cadence Samsung is a Tick and TSMC is a Tock. One year Apple uses Samsung and the next year it uses TSMC. Apple switches back and forth for its next generation phone every year - "Tick Tock". This switching strategy keeps each on its toes and keeps Apple at the bleeding edge, and keeps a yearly cadence for fall delivery of new Iphones in time for the holiday season.
Carrot & Stick..
Apple's chip business is a big fat juicy carrot that grows every year. The stick is the loss of that business and the loss of bragging rights associated with it. Apple keeps Samsung and TSMC competing & running ever faster, fast enough to potentially catch Intel at 10nm through this competitive dynamic.
Meanwhile the carrot that is the PC processor business is shriveling and not as appetizing and perhaps Intel isn't running quite as fast as the reward isn't what it once was and the competition (if you could call it that) that was once AMD is virtually gone. Why run hard and fast for a shrinking prize when there is no one else competing for that business and its not like Intel is in the running for Apple's foundry business (although we think they should be...)
Money follows money....
Aside from the competitive dynamics theres money in them thar hills of Apple and Qualcomm. It takes money to make money and that is the definition of capex and R&D spending in the chip industry. If you don't spend the increasing money you are not in the game and the stakes continue to grow freezing out all but the largest and strongest and richest who can ante up.
Does a decreasing Moore's law cadence decrease capital intensity?.... Do the math.....
The math is easy. If Intel was spending $10B a year on a two year cadence of Moore's law that means each new node cost $20B in equipment. If you slow that to three years it seems to us that mathematically that $20B is now spread over a three year period or $6.66B a year and during that period Intel gets more devices (hence more mileage ) out of each node increasing their financial payback and greatly reducing their capital intensity.
Am I missing something or is my calculator broken???
Not a happy thought for the equipment industry if the cadence slows down across the board. It more than offsets the increasing cost per node. The cost per node would have to go up by 50% per node for capital intensity to remain flat.
Tell me where I am wrong...... The blame game....
We found it quite interesting and unusual that Intel Ceo BK called out ASML without mentioning them by name but clearing laying the blame at the feet of the EUV lithography tool that is obviously way overdue and responsible for much of the delay (wow, how time has flown since the 15 tool order....).
We would point out that the industry also has itself to blame as it did little to promote competition and alternatives and instead put all its eggs in one risky basket that failed to deliver. Maybe the semi industry should have taken a page out of Tim Cooks playbook and kept at least two litho alternatives on the hook and competing with one another for the very lucrative business. Lack of competition breeds complacency.
In the mean time AMAT & LRCX get to sell more dep and etch tools.......
Investors forgot it’s a cyclical industry…
We have been on a very long run, long enough for many investors to forget this is a cyclical industry and have enough new analysts and investors enter who have never been through a real down cycle. While we think the industry is no where near as cyclical as it was in the bad old days we would at least agree with the premise that it is a "variable" business with a number of cylinders of business all of which rarely fire all at once. Right now 3D NAND is cranking and others are idling or sputtering.
Intel is doing what’s right for Intel...
Intel is reducing its capital intensity, getting more juice out of a node, cutting costs and delivering better numbers in a declining market. What else would Wall St have them do? It is the quest for quarterly numbers that they are responding to. You got lemons and you make lemonade....
We told you so....again...
We are again "surprised" at the "surprise" of Wall St to the Intel news as we have been talking about it for many quarters. It shouldn't have been the surprise it was except for all those who were asleep. The stocks reacted badly because no one wanted to believe until it hit them in the face and they heard it from Intel directly. The sell off is more than the value of Intel's reduction of capex but is more of a reflection of the fear that the industry is rolling over and Intel is the last straw in a string of poor news in the space. Intel had already been well discounted by every tool maker we know as it wasn't even a little bit of a surprise to any one of them, and as such will not likely significantly hurt current numbers...
We explicitly called out the rapidly worsening Intel 10nm delay a month ago and further proved it with data two weeks ago....Is there anyone out there reading?
Much like the surprise of the AMAT/TEL deal implosion we called 3 weeks before it happened or EUV that we have been talking about slowing the industry for years.
I hope someone is paying attention and keeping score....
Lest anybody forget ....its all about the money, Intel, Apple, capex, etc; etc; ...Moore's law remains primarily a financial law
We're again "surprised" at the "surprise" of Wall Street. . . .
We explicitly called out the rapidly worsening Intel 10nm delay a month ago and further proved it with data two weeks ago....Is there anyone out there reading?
Robert Maire
Semiconductor Advisors LLC
I think "surprise" is the wrong word and I have read everything RM has written on Semiwiki. In November last year I was reading slides that said Intel's technology was three years ahead! Their costs per transistor were the lowest in the industry, when depreciation for 2014, spread over the 400 million units Krzanich boasted of, was $18.5 compared with $19.7 Lora Ho said she charges Apple.
The question is who or what does Wall Street or investors like myself believe? Intel maintains a humongous spin machine so when Krzanich himself acknowledges that they have lost control of Moore's Law, that is indeed news.
I agree with everything Rmaire has said but I would put it differently and in terms of the consequences of the foundries being able to give service beyond what Intel can provide itself. The smartphone market is further beyond Intel's power to invade, there is a open door for Apple to design its own PC chip and the various companies looking for a foothold in the server market have access to fabrication as good as anything that is available.
What happens now? Krzanich decided to buy Altera. Looks to me like digging when he is in a hole.
I think some of this is specmanship. Once a 0.1um process meant that you could measure something (the transistor length and perhaps the metal one width and spacing) and find that it was indeed 0.1um. Now we have processes called 14nm but there is nothing that is 14nm at all on them. One reason that the foundries don't even use words like 14nm or 16nm. They talk about the 16FF+ process or 22FDX and admit it is just a name. Down to 22nm/20nm there was a certain level of discipline since by unspoken agreement 22nm meant 80nm metal pitch requiring no double patterning and 20nm meant less, requiring double patterning and all the graph coloring stuff in the tools. For example, the recently announced 22FDX processes from GF don't require double patterning. Intel 22nm, no double patterning; TSMC 20nm, double patterning. But after that there is not a lot of agreement.
As a result what Intel calls 10nm and what TSMC calls 10nm are wildly different. At 10nm, Intel's gate-pitch * metal 1 pitch is 2101nm2 but TSMC's is 3220nm2, over half as big again. These are not the same process. If Intel is struggling to get 10nm out and TSMC is having a walk in the park (remains to be seen, of course) it is because what Intel calls 10nm is what TSMC would call 8nm or something.
Dan has speculated that since Intel 14nm and TSMC 10nm are not that far apart that Intel might avoid the capital cost of going to 10nm and skip straight to 7nm, and take a year or two off sinking billions of dollars in capital. They have the happy situation in their mainline server microprocessor business of having no real competition. Power constraints mean that processor clock rates can't go up much and it is hard to get much more performance increase out of change of architecture, everything known has already been done. Their customers might like higher performance, lower power, more cores or whatever, but if they don't get them then they can't exactly switch overnight to ARM or MIPS or AMD or anyone else.
Paul, thanks for your thorough explanation. In the history of node naming, Intel's current 10 nm used to be "11" nm and it was probably "12" or "13" nm before that. It could be time for a node name recalibration (it doesn't mean much anyway). Maybe Intel can call it 9 nm or 8 nm, instead of 10 nm. Then the following node would be 6 nm. Since there is more than one option for pitch halving or pitch quartering, Intel is likely taking more time to weigh these options for the two nodes after (its) 14 nm node. There are more options without EUV than usually mentioned, but each option is still a committed flow.
Assuming Intel's 14nm technology is almost as good as the foundries' 10nm, so why are they struggling so much, moreover in the mobile market? In theory they should not have any real competition at 14nm.
Reality is that so far their SoC performance is disappointing. They also claim they have the best density and eventually they must still use the contra revenue to compete.
So, what's wrong here?
In silicon we trust!
They could be revising their multi-patterning flow. It's not unfeasible, many more cost-effective options have become known in the past year. Alternatively, but less likely, maybe they're changing their transistor.
