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dear daniel
tnx for replay. I'm engineer and i want to design a digital block & an analog block that can work together and simulate in cadence,
the digital block is VHDL code and the analog block is transistor level but i don't know how to import VHDL code in cadence and simulate it!!!!!!!!!!!!!!!!!!
i know that there is NC_verilog and verilog_xl in the cadence , can i write vhdl code (not verilog ) with NC_verilog or verilog_xl ?how to do it ?
dear daniel
I'm engineer and i want to design a digital block & an analog block that can work together and simulate in cadence, The digital block is VHDL code and the analog block is transistor level but i don't know how to import VHDL code in cadence and simulate it!!!!!!!!!!!!!!!!!!
The digital side of it shouldn't matter, since Incisive supports both VHDL and Verilog, either individually or in a mixed environment.
For the analog side of it, there are two solutions: the AMS (Analog Mixed Signal) and DMS (Digital Mixed Signal) option. The difference is that for the AMS design, you're using an analog kernel to simulate the analog side of it. For DMS, you model using wreal, which are real numbers.
There's plenty of information on the Cadence website on these approaches, just google "cadence analog mixed signal" or "cadence digital mixed signal". You can also contact your Cadence AE for more information, a presentation, etc.
hi all
i design a digital block in nclounch but now i don't know how import a digital block ic cadence.
i search in internet but i don't find any useful tutorial for mix-mode simulation in cadence, can you send for me useful tutorial????????
tnx