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Google's next TPU may have become the most important packaging battleground in AI.
After Intel unexpectedly won Google's next-generation TPU packaging business with EMIB-T, TSMC appeared to be on the defensive. But as concerns grow over yield, reliability, and manufacturing readiness, industry sources say the story may not be over.
Could Google's next TPU shift back to TSMC?
This isn't just a fight between Intel and TSMC. It's a high-stakes test of whether EMIB can emerge as a credible alternative to CoWoS—and whether Google's AI infrastructure roadmap could ultimately reshape the balance of power across the semiconductor industry.
I honestly do not feel that there is a big enough technical difference between EMIB and CoWos to justify moving a proven product over. The two reasons I have heard is lack of sufficient CoWoS capacity, which is no longer the case. The other is to have non TSMC logic die inside the package which I do not believe Google does for their TPU. It is all TSMC die.
I honestly do not feel that there is a big enough technical difference between EMIB and CoWos to justify moving a proven product over. The two reasons I have heard is lack of sufficient CoWoS capacity, which is no longer the case. The other is to have non TSMC logic die inside the package which I do not believe Google does for their TPU. It is all TSMC die.
things might shift a bit when more diverse process nodes chips are making into the same adv packaging. Obvious example is photonics, there might be other HV and PMIC in the play. TSMC certainly does not dominate in these area as they do in logic. TSMC will sooner or later reevaluate whether they allow any other non-tsmc chips that are not memory in their adv packaging eco-system.
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