Intel Foundry is way behind TSMC, but the goal is #2 by 2030

[NY_Sam2]

Once behind, everything becomes complicated/difficult. Then, need to compromise and be pragmatic/realistic.

If Customers do not commit, it is not because Intel Foundry PDK specs are not as good as TSMC, but because cannot be assured if Intel Foundry can deliver or not.

Intel Foundry, how about increasing BEOL M0 pitch from 32nm to 34nm for 18A & 18A-P? How about (not 25-26nm but) 28nm for 14A? Plan B if EUV High NA0.55 does not work?

In 2020, TSMC showed M0 18nm. When for HVM, 2030 (or never)?

At 2022-Dec-IEDM, TSMC presented CPP 45nm for N3B/N3E. In 2023-May, revealed 48nm for N3E. Link = https://fuse.wikichip.org/news/7375/tsmc-n3-and-challenges-ahead/

At 2022-Dec-IEDM, TSMC presented M0 23nm with "an innovative liner". In 2024-Jul, Applied announced RuCo liner, not needed for Intel? Link = https://ir.appliedmaterials.com/new...s-unveils-chip-wiring-innovations-more-energy

At 2025-Jun-VLSI, Intel showed same CPP 50nm from Intel 3 to Intel 18A. Like this being pragmatic/realistic.

Why backside power for Intel Foundry? Since not competitive against TSMC for Cell Height without it! Since for M0, Intel 18A 32nm vs TSMC N3B/N3E 23nm.

Link = https://semiwiki.com/semiconductor-...ghts-of-the-tsmc-technology-symposium-part-1/

 

[Daniel Nenni]

Intel being the second largest foundry should not be a problem once they shift all Intel products back to Intel manufacturing. Samsung Foundry counts internal products as revenue so this is business as usual for IDM foundries.

Intel or Samsung catching up to TSMC is years away if ever. The pure-play foundry business model is just too strong.

Intel does have a great packaging story (BSPD). Samsung not so much. Maybe Samsung should use Intel Foundry and just focus on memory? If Samsung 2nm fails like Samsung 3nm will they have a choice? I do not see Samsung partnering with TSMC.

 

[tomatoma]

Personally I think it's impossible...

 

[tomatoma]

I'm very unsure...

 

[hskuo]

Intel being the second largest foundry should not be a problem once they shift all Intel products back to Intel manufacturing. Samsung Foundry counts internal products as revenue so this is business as usual for IDM foundries.

Intel or Samsung catching up to TSMC is years away if ever. The pure-play foundry business model is just too strong.

Intel does have a great packaging story (BSPD). Samsung not so much. Maybe Samsung should use Intel Foundry and just focus on memory? If Samsung 2nm fails like Samsung 3nm will they have a choice? I do not see Samsung partnering with TSMC.

From my understanding, actually the gap is widening not narrowing. There are lots of revenue tricks for IDM in Foundry business and currently government involvement is deepened, then the revenue becomes a tricky index.

 

[MKWVentures]

Intel being the second largest foundry should not be a problem once they shift all Intel products back to Intel manufacturing. Samsung Foundry counts internal products as revenue so this is business as usual for IDM foundries.

Intel or Samsung catching up to TSMC is years away if ever. The pure-play foundry business model is just too strong.

Intel does have a great packaging story (BSPD). Samsung not so much. Maybe Samsung should use Intel Foundry and just focus on memory? If Samsung 2nm fails like Samsung 3nm will they have a choice? I do not see Samsung partnering with TSMC.

Couple items:

the 2nd largest foundry commitment in 2030 was made for external foundry. they said they would be number 2 overall including internal earlier (the date is now in the past)

Today, Intel is not a top external fab foundry or OSAT for other companies. they are very small in both. In packaging, there revenue is dropping over the past 2 years
over half of their external business today is because Altera is now external (hint Altera will make some changes).

Intels correct goal is to top HH group in revenue and get to be half as big as Global by 2030. It is not clear how they can do this.

Intel plans to run 25-30% at TSMC (and Intel still uses Samsung) indefinitely. There are no plans at all to move internal.

BSPD is not packaging.... and most customers do not want it at this time.

Last weeks earnings were not a good advertisement for IFS IMHO. Lets see what the fallout is

 

[IanD]

Couple items:

the 2nd largest foundry commitment in 2030 was made for external foundry. they said they would be number 2 overall including internal earlier (the date is now in the past)

Today, Intel is not a top external fab foundry or OSAT for other companies. they are very small in both. In packaging, there revenue is dropping over the past 2 years
over half of their external business today is because Altera is now external (hint Altera will make some changes).

Intels correct goal is to top HH group in revenue and get to be half as big as Global by 2030. It is not clear how they can do this.

Intel plans to run 25-30% at TSMC (and Intel still uses Samsung) indefinitely. There are no plans at all to move internal.

BSPD is not packaging.... and most customers do not want it at this time.

Last weeks earnings were not a good advertisement for IFS IMHO. Lets see what the fallout is

Depends what you mean by "most customers"... ;-)

TSMC have said the BSPD (A16 process as opposed to N2) is suitable for HPC chips with "dense power grid and active cooling" -- the first because getting rid of the topside power grid saves area/increases/density/reduces die size/allows cramming more gates into a reticle (which then dissipate more power), and the second because the higher thermal resistance means worse SHE (Self-Heating Effect) so the die has to be kept cooler, which in practice means liquid cooling. Plus the wafers cost more, which is not good for many customers.

So if you need a massive die hammering along crunching data -- for example, AI -- where density matters more than die cost and you're going to liquid-cool anyway to deal with the kilowatt-level power dissipation, BSPD is great -- and there are several *enormous* customers who want exactly this, and want huge quantities of massive chips which add up to a lot of wafers -- but probably only a handful of designs.

But the majority of customers and products don't fall into these categories, especially cooling and cost, and so don't want BSPD -- and probably won't in the near future either. All those non-BSPD products -- probably including mobile phones, and maybe laptop CPUs -- add up to a *lot* of wafers because there are so many of them, even if the wafer use *per product* is smaller than the behemoths above.

Given that TSMCs over-riding principle is "give the customers what they want", I expect they'll carry on supporting both BSPD and conventional processes for some time to meet both types of demand.

Which is exactly what Intel *haven't* done by putting all their eggs into the BSPD basket... ;-)

 

[MKWVentures]

Depends what you mean by "most customers"... ;-)

TSMC have said the BSPD (A16 process as opposed to N2) is suitable for HPC chips with "dense power grid and active cooling" -- the first because getting rid of the topside power grid saves area/increases/density/reduces die size/allows cramming more gates into a reticle (which then dissipate more power), and the second because the higher thermal resistance means worse SHE (Self-Heating Effect) so the die has to be kept cooler, which in practice means liquid cooling. Plus the wafers cost more, which is not good for many customers.

So if you need a massive die hammering along crunching data -- for example, AI -- where density matters more than die cost and you're going to liquid-cool anyway to deal with the kilowatt-level power dissipation, BSPD is great -- and there are several *enormous* customers who want exactly this, and want huge quantities of massive chips which add up to a lot of wafers -- but probably only a handful of designs.

But the majority of customers and products don't fall into these categories, especially cooling and cost, and so don't want BSPD -- and probably won't in the near future either. All those non-BSPD products -- probably including mobile phones, and maybe laptop CPUs -- add up to a *lot* of wafers because there are so many of them, even if the wafer use *per product* is smaller than the behemoths above.

Given that TSMCs over-riding principle is "give the customers what they want", I expect they'll carry on supporting both BSPD and conventional processes for some time to meet both types of demand.

Which is exactly what Intel *haven't* done by putting all their eggs into the BSPD basket... ;-)

great info.... very well put, thanks!

 

[NY_Sam2]

thanks to MKWVentures & IanD for "BSPD .. most customers do not want it at this time"
Intel Foundry, how about providing 2 versions for Intel 14A? One of smaller Cell Height with BSPD & another of larger Cell Height without BSPD

 

[IanD]

thanks to MKWVentures & IanD for "BSPD .. most customers do not want it at this time"
Intel Foundry, how about providing 2 versions for Intel 14A? One of smaller Cell Height with BSPD & another of larger Cell Height without BSPD

It's not that simple, the metal stack and processing and qualification and DK and extraction and layout and libraries and SRAMs and [...lots of other things...] are different, especially if like Intel you've done cell layouts which take full advantage of BSPD but are not backwards compatible with FSPD... :-(

It's why N2 and A16 are down as two different processes at TSMC -- and I believe they've done fewer BSPD-specific optimizations to the standard cell layouts than Intel so the libraries are compatible? (not 100% sure about this...)

 

[hist78]

Intel being the second largest foundry should not be a problem once they shift all Intel products back to Intel manufacturing.

Intel’s product division generates the majority of the company’s revenue and profit. Product competitiveness and market opportunity should be the top priority, not Intel Foundry or Intel Foundry’s external customers.

Forcing 100% sourcing from IFS would hurt Intel, IFS, and the entire product business. Without a healthy and profitable product division, where would IFS get the capital for future CapEx?

 

[t2msemi2018]

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[Artificer60]

It's not that simple, the metal stack and processing and qualification and DK and extraction and layout and libraries and SRAMs and [...lots of other things...] are different, especially if like Intel you've done cell layouts which take full advantage of BSPD but are not backwards compatible with FSPD... :-(

It's why N2 and A16 are down as two different processes at TSMC -- and I believe they've done fewer BSPD-specific optimizations to the standard cell layouts than Intel so the libraries are compatible? (not 100% sure about this...)

I'm sure that with all the conversations Lip-Bu Tan has had with customers he has become aware of the customers who want traditional front side power. I'll be surprised if Intel doesn't do an A16 on 14A and add a front side power option.

 

[siliconbruh999]

I'm sure that with all the conversations Lip-Bu Tan has had with customers he has become aware of the customers who want traditional front side power. I'll be surprised if Intel doesn't do an A16 on 14A and add a front side power option.

the second option is to make BSPDN cost effective so they don't have to make two separate flows.

 

[IanD]

the second option is to make BSPDN cost effective so they don't have to make two separate flows.

That would help, but being more expensive isn't really the biggest issue, it's that for lower-power chips with less dense power grids the area saving is less and the performance improvement smaller (so why bother with BSPD?) -- but especially the fact that you need to keep the back of the die considerably cooler to keep self-heating and leakage (and reliability and EM) under control.

When we looked into this the heatsink needed to be kept around 20C cooler with BSPD for the same die temperature in hotspots (because vertical heat spreading is bad but lateral is even worse now there's no thick silicon substrate), and that's simply impossible in many use cases which rely on air cooling or have a maximum allowable case temperature, including ours... :-(

This problem is only getting worse with each node because power density per mm2 is if anything increasing not decreasing, and current per mm2 even more so as supply voltages slowly decrease and more and more gates are crammed in -- it's why the highest dissipation chips are now well past 1kW, and still rising... ;-)

 

[IanD]

I'm sure that with all the conversations Lip-Bu Tan has had with customers he has become aware of the customers who want traditional front side power. I'll be surprised if Intel doesn't do an A16 on 14A and add a front side power option.

You mean add another not-really-big-enough-volume (and late to market!) process to the one they're already got -- plus you need different libraries and IP which means more effort and investment... :-(

It works for TSMC because they have both the handful of huge-volume HPC customers for BSPD (e.g. A16) and a massive number of small-to-pretty-damn-big customers for FSPD (e.g. N2), the production volumes and revenue for both variants are easily big enough to justify the investment and IP generation by the (also massive) TSMC ecosystem.

I just don't see this working for Intel -- their least bad option is to do what they're doing now which is focus all their efforts on BSPD to try and grab a few of the HPC customers for 14A, always assuming they have enough fab capacity to meet demand. They can't compete against TSMC for the FSPD market (where they would also be very late to market, and with higher costs and lower yields) which means supporting a large number of diverse customers (which they're not set up to do) with a wide and deep IP ecosystem (which they don't have).

They're never going to win here, it would only increase their costs further and divert effort from BSPD.

 

[MKWVentures]

You mean add another not-really-big-enough-volume (and late to market!) process to the one they're already got -- plus you need different libraries and IP which means more effort and investment... :-(

It works for TSMC because they have both the handful of huge-volume HPC customers for BSPD (e.g. A16) and a massive number of small-to-pretty-damn-big customers for FSPD (e.g. N2), the production volumes and revenue for both variants are easily big enough to justify the investment and IP generation by the (also massive) TSMC ecosystem.

I just don't see this working for Intel -- their least bad option is to do what they're doing now which is focus all their efforts on BSPD to try and grab a few of the HPC customers for 14A, always assuming they have enough fab capacity to meet demand. They can't compete against TSMC for the FSPD market (where they would also be very late to market, and with higher costs and lower yields) which means supporting a large number of diverse customers (which they're not set up to do) with a wide and deep IP ecosystem (which they don't have).

They're never going to win here, it would only increase their costs further and divert effort from BSPD.

Intel has 4x as many process options on 18A as they do customers interested in working with IFS LOL

 

[IanD]

Intel has 4x as many process options on 18A as they do customers interested in working with IFS LOL

I'm sure they do -- but trust me, the differences between BSPD and FSPD are *far* bigger than just some different options in either process -- it's not just the raw process, the manufacturing flow is different, as are things like planarity and reliability and qualification and libraries and tools and extraction and thermal modelling and IP and...

Even with TSMC there might be many metal stack options available in theory (e.g. if you look in the PDK documents), but then you find that a lot of IP is only available in a few of the more popular metal stacks chosen by multiple customers -- so in practice this restricts what is realistically usable.

Which can be very frustrating if you've chosen a particular stack for very good but specific reasons, and you then find out some IP that you wanted to use isn't available in it -- or even worse you find a reliability problem when packaged even though you followed the rules. DAMHIK... :-(

 

[MKWVentures]

I'm sure they do -- but trust me, the differences between BSPD and FSPD are *far* bigger than just some different options in either process -- it's not just the raw process, the manufacturing flow is different, as are things like planarity and reliability and qualification and libraries and tools and extraction and thermal modelling and IP and...

100% agree. I was asked by a Client how to change a process from BSPD to FSPD and I said, "its a different animal. I dont even think I could make a cartoon of how to do that or what the impact on cost would be". Then there is the modeling, layout, chip design.

This is also affecting Intel continuing to use TSMC going forward indefinitely.

 

[Artificer60]

It works for TSMC because they have both the handful of huge-volume HPC customers for BSPD (e.g. A16) and a massive number of small-to-pretty-damn-big customers for FSPD (e.g. N2), the production volumes and revenue for both variants are easily big enough to justify the investment and IP generation by the (also massive) TSMC ecosystem.

Not sure I agree with the logic here. Intel's biggest need right now is to fill the fabs. Choosing not to even try to serve a large portion of the potential market doesn't seem like a winning prospect to me. Yes the upfront expense is high, but the cost of underutilized fab space is astronomical. Just like interest, the cost of unused fab space never rests, it just keeps sucking up money.

Intel's plan is for these new nodes to run for over a decade plus. That is a lot of time to recover the upfront investment. I think being too concerned about a short term up front cost is short sighted and will cost Intel more in the long run.

I also don't think Intel wants to paint themselves out of the picture to manufacture the designs that their new ASIC design business will potentially generate. With BSPD being primarily aimed at HPC applications it seems to me front side power will be more desirable for many ASIC applications. Including the option in the foundry offerings gives these ASIC customers an easy on-ramp to work with Intel foundry.