AI chip startup Ricursive has raised $300M at a $4B valuation, led by Lightspeed Venture Partners.

[swka]

It seems just yesterday they raised $35M on a 700M valuation seed money. Perhaps just one of the crazy AI boom "dump" money gets thrown around.

What's crazier about this one is that on paper, it is producing end to end chip design tools, not chips at the most advanced technology. Where and how are they going to spend $300M to develop some EDA S/W. The roadmap must have included actual customized XPU development somehow, unless they are borrowing playboard from Meta to through 100M plus per top notch engineer.

Ricursive Intelligence nabs $300M to speed up chip design with AI - SiliconANGLE

Ricursive Intelligence nabs $300M to speed up chip design with AI - SiliconANGLE

siliconangle.com

 

[t2msemi2018]

From an industry perspective, the valuation is less surprising than the implied execution plan behind it.

End-to-end EDA development is not simply a software challenge — it is an ecosystem problem. Front-end, physical design, verification, signoff, PDK enablement, foundry qualification, and customer flow integration require years of co-development with fabs, IP providers, and anchor customers. Historically, even the most successful EDA companies scaled through highly focused product wedges, not capital-intensive, full-stack ambitions.

A $300M+ capital plan suggests this is unlikely to remain a pure EDA play. Software alone does not naturally absorb that level of investment unless accompanied by one or more of the following:

• Deep, long-term co-development programs with leading foundries and hyperscalers
• Parallel development of reference silicon, custom accelerators, or vertical XPU platforms
• An aggressive talent acquisition strategy to assemble a full-stack silicon + tools organization

If the roadmap includes customized compute platforms where the tools become part of a tightly coupled hardware-software stack, the valuation becomes more understandable. If not, the capital intensity appears significantly misaligned with traditional EDA economics.

The more interesting question may not be valuation, but positioning: whether this evolves into a next-generation EDA vendor, a silicon platform company, or a new class of vertically integrated AI compute infrastructure provider.

From T2M Semi’s viewpoint, the success of such a model will depend less on funding levels and more on how effectively the company can integrate tools, silicon, and ecosystem partnerships into a scalable, production-ready platform.

 

[swka]

From an industry perspective, the valuation is less surprising than the implied execution plan behind it.


End-to-end EDA development is not simply a software challenge — it is an ecosystem problem. Front-end, physical design, verification, signoff, PDK enablement, foundry qualification, and customer flow integration require years of co-development with fabs, IP providers, and anchor customers. Historically, even the most successful EDA companies scaled through highly focused product wedges, not capital-intensive, full-stack ambitions.


A $300M+ capital plan suggests this is unlikely to remain a pure EDA play. Software alone does not naturally absorb that level of investment unless accompanied by one or more of the following:


• Deep, long-term co-development programs with leading foundries and hyperscalers
• Parallel development of reference silicon, custom accelerators, or vertical XPU platforms
• An aggressive talent acquisition strategy to assemble a full-stack silicon + tools organization


If the roadmap includes customized compute platforms where the tools become part of a tightly coupled hardware-software stack, the valuation becomes more understandable. If not, the capital intensity appears significantly misaligned with traditional EDA economics.


The more interesting question may not be valuation, but positioning: whether this evolves into a next-generation EDA vendor, a silicon platform company, or a new class of vertically integrated AI compute infrastructure provider.


From T2M Semi’s viewpoint, the success of such a model will depend less on funding levels and more on how effectively the company can integrate tools, silicon, and ecosystem partnerships into a scalable, production-ready platform.

agree on this is much more than an EDA tool play. As I mentioned, makes better sense to be able to tune out custom ASIC (XPU) in a much faster iteration than all the XPU vendors (big and startup alike), so that it can adapt to different application and even architecture changes in underline foundation models. Makes no sense to rebuild all the verification and sign off, which will take a LONG time to qualify and gain confidence of industry

 

[Paul2]

So far, the only thing "eating" the EDA triopoly were the niche, open-source tools, which are now getting mature enough for taping out 7400 complexity level chips commercially. Don't get the 7400 reference wrong, it's an enormous volume of chips, which are used everywhere.

 

[swka]

So far, the only thing "eating" the EDA triopoly were the niche, open-source tools, which are now getting mature enough for taping out 7400 complexity level chips commercially. Don't get the 7400 reference wrong, it's an enormous volume of chips, which are used everywhere.

Paul, can you provide links to what are these open source tools that are getting non-trivial usage?

 

[Daniel Nenni]

If you want to talk about AI bubbles, the valuations of these AI chip VC investments are Deja Vue of the Dot Com era.

AI and EDA is a great match. I feel a really big disruption coming. I am already seeing it in verification. AI was prominent at the last DVCon. This year's even more so. Take a look at ChipAgents, Bronco AI, Mach42, and Moore's Lab AI. It is a fast moving market though so I hope the open source tools get AI quickly.