Semiwiki on LinkedIn Semiwiki on Facebook Semiwiki on Twitter Register / Log in 
Array
(
    [content] => 
    [params] => Array
        (
            [0] => /forum/search/296941/?c%5Busers%5D=Daniel+Payne&o=date&page=6
        )

    [addOns] => Array
        (
            [DL6/MLTP] => 13
            [Hampel/TimeZoneDebug] => 1000070
            [SV/ChangePostDate] => 2010200
            [SemiWiki/Newsletter] => 1000010
            [SemiWiki/WPMenu] => 1000010
            [SemiWiki/XPressExtend] => 1000010
            [ThemeHouse/XLink] => 1000970
            [ThemeHouse/XPress] => 1010570
            [XF] => 2021770
            [XFI] => 1050270
        )

    [wordpress] => /var/www/html
)

Search results

Search the forum Search Semiwiki WordPress
  1. Daniel Payne

    COVID-19 in Oregon

    At least in the fabs they are wearing bunny suits, which should provide adequate protection from the novel coronavirus, however once they change into street clothes and are in the locker room or lobby, then the virus can spread in those areas.
  2. Daniel Payne

    COVID-19 in Oregon

    Kate Brown, Governor of Oregon announced tonight that all events with 250 or more people would be stopped for the next four weeks, in an effort to slow down the spread of coronavirus. Intel and Mentor are asking their employees to work remotely from home. As a freelance blogger, I will continue...
  3. Daniel Payne

    Call for Submissions: ACM SIGDA/IEEE CEDA Ph.D. Forum at DAC 2020

    DEADLINE: April 15, 2020 -------------------------------------------------- DAC Ph.D. Forum San Francisco, CA | July 19-23 The Ph.D. Forum at the Design Automation Conference is a poster session hosted by ACM SIGDA and IEEE CEDA for Ph.D. students to present and discuss their dissertation...
  4. Daniel Payne

    Barrie Gilbert (Analog Devices, Tektronix) - Memorial on Feb 29th in Oregon

    Barrie Gilbert of Beaverton died Jan. 30, 2020 at St. Vincent Hospital from a traumatic brain injury following a fall at home. Barrie was born June 5, 1937, to Fredrick Arthur and Edith (Tansley) Gilbert in Bournemouth, Dorset, England. His father died in a bombing attack when Barrie was three...
  5. Daniel Payne

    DVCon U.S. 2020 – Don’t Miss It!

    Accellera Day opens the conference on Monday with a full morning tutorial, ““Portable Stimulus: What’s Coming in 1.1 and What it Means for You” presented by members of the Accellera Portable stimulus Working Group. An Accellera-sponsored luncheon will follow with updates on Accellera activities...
  6. Daniel Payne

    Will TSM Totally Dominate MEMS?

    TSM is in 5th place as a MEMS foundry, behind: STMicroelectronics, Teledyne Dalsa, Sony, Silex Microsystems. Lots more info at the Yole site. http://www.yole.fr/Top30_MEMS_Manufacturers.aspx
  7. Daniel Payne

    ICCAD 2020: Call for Papers and Participation

    2020 Call for Papers Original technical submissions on, but not limited to, the following topics are invited: System-Level CAD Synthesis, Verification, & Physical Design SOC Analysis, Simulation, & Testing CAD for Emerging Technologies, Paradigms, & Applications Deadline for Abstract...
  8. Daniel Payne

    Shorter Bring-up Time at highest System Speed - PRO DESIGN's proFPGA Cut Software simplifies and improves FPGA-based Prototyping tremendously

    Munich, 03 February 2020 - PRO DESIGN, leading supplier of FPGA based prototyping systems, today launched its new proFPGA Cut software, a new design partitioning front-end tool for its popular proFPGA multi-FPGA prototyping platforms. This new tool significantly reduces the design bring-up time...
  9. Daniel Payne

    DATE 2020 Deadline Early-Bird Registration: 5 February 2020

    DATE 2020 is approaching fast and so is the deadline for the early-bird registration. Register online NOW in order to benefit from the early-bird registration fee. Deadline: 5 February 2020, 23:59:59 CET DATE 2020 will take place at Alpexpo in Grenoble, FR from 9 to 13 March 2020 and will be...
  10. Daniel Payne

    why EUV instead of 157 immersion?

    The 157nm immersion approach got us to sub-40nm lithography, however starting at sub-28nm we had to start using multi-patterning, or multiple masks per layer. EUV has a 13.5 nm wavelength and this allows the industry to do many of the critical layers in 11nm and smaller nodes. Mask costs are...
  11. Daniel Payne

    Recap of 12th International MOS-AK Workshop on December 11, 2019

    Arbeitskreis Modellierung von Systemen und Parameterextraktion Modeling of Systems and Parameter Extraction Working Group 12th International MOS-AK Workshop (co-located with the IEDM and CMC Meetings) Silicon Valley, December 11, 2019 Together with Silvaco, lead sponsor and local organization...
  12. Daniel Payne

    Aldec at SC19: Showcasing Multi-FPGA Partitioning Software for Multi-FPGA-based Algorithm Accelerators

    November 18-21, Denver Colorado Booth #228, Aldec Inc. We will showcase the recently introduced automatic FPGA partitioning feature of our popular HES-DVM™ tool, our fully automated and scalable hybrid verification environment for large SoC designs. Manual partitioning of designs with...
  13. Daniel Payne

    With proFPGA quad Intel® Stratix® 10 GX 10M System, PRO DESIGN Reaches a new Level in FPGA-based Prototyping

    Munich, 18 November 2019 - PRO DESIGN, leading supplier of high-speed ASIC and SoC verification platforms, today announced the launch of its innovative high-capacity proFPGA quad Stratix® 10 GX 10M system. It is the next generation of its successful, modular, scalable and most compact...
  14. Daniel Payne

    TSMC Files Complaints Against GlobalFoundries in U.S., Germany and Singapore for Infringement of 25 Patents!

    The lawyers are going to get rich, and the two foundries will settle out of court, both claiming victory in the next 12 months or so. Such a common corporate tactic in high-tech to file countering complaints on patent violations.
  15. Daniel Payne

    New Apple iPhones (meh)

    When I read the benchmark comparison between an iMac 2019 vs iPhone 11, it shows the Intel-based iMac with higher scores:
  16. Daniel Payne

    New Apple iPhones (meh)

    I was also impressed with the 8.5 billion transistors of the A13 chip on the 7nm+ process, along with improved battery life. So glad to have invested in AAPL stock a few years back. Also amazed at the growth of services at Apple, but their streaming service is clearly not ready to compete with...
  17. Daniel Payne

    VLSI Design Methodology Development Webinar Replay and Follow up Q&A!

    Tom, very comprehensive topics in your book with 700+ pages. I look forward to added content on topics like: packaging, 2.5D, 3D chips, chiplets, IBIS modeling.
  18. Daniel Payne

    IP Security Assurance Standard - White paper

    Authors Brent Sherman, Intel Corporation Mike Borza, Synopsys James Pangburn, Cadence Design Systems, Inc. Ambar Sarkar, NVIDIA Corporation Wen Chen, NXP Semiconductors Anders Nordstrom, Synopsys Kathy Herring Hayashi, Qualcomm Michael Munsey, Methodics John Hallman, OneSpin Solutions Alric...
  19. Daniel Payne

    Is EETimes Dead? Again?

    The first end was Richard Goering exiting EE Times, because he covered so much of the EDA industry for so long.
  20. Daniel Payne

    Is EETimes Dead? Again?

    So sad, but kind of predictable. EE Times was my go-to weekly reading starting back in 1978.
Back
Top