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I have been looking into this, there are couple of reports in the press in Taiwan but nothing from TSMC. There are press releases from TSMC about the Fab in Japan but I can't find anything about this fab. Also, 7nm and 28nm in the same fab makes no sense to me. TSMC's 7nm business is all...
I have been looking into this, there are couple of reports in the press in Taiwan but nothing from TSMC. There are press releases from TSMC about the Fab in Japan but I can't find anything about this fab. Also, 7nm and 28nm in the same fab makes no sense to me. TSMC's 7nm business is all...
When you talk about defect density you have to keep in mind that it varies by defect model, e.g. Murphy defect density isn’t the same as Seeds, etc.
I have decades of defect density data but it isn’t something I am going to share here and I have had to put a lot of work into calibrating it all...
The Fab shell TSMC is building in Arizona is a lot bigger than they need for 20k wpm, my expectation is they would be to ramp it up above 20k wpm before they build another shell. TSMC always builds extra clean room space.
Keep in mind that he is trying to frame this discussion and debate in the way that is most favorable to TSMC and what TSMC wants.
I remember when 300mm first started to ramp and he made a statement that only companies with something like $5 billion dollars in revenue would be able to afford...
Intel has talked about 20A being primarily for internal use as a kind of test case and then 18A as the improved process that gets adopted by foundries. 4nm and 3nm are similar, 4nm more for internal use and then 3nm for foundry.
The manufacturer sometimes disclose what process they are using, especially the big guys like Apple, Qualcomm, Intel and others at the leading edge.
There are also tear down services like TechInsights that measure the parts to determine the node.
TSMC will make money, just not as much as other sites. The cost issue is discussed here: https://semiwiki.com/semiconductor-manufacturers/tsmc/303594-tsmc-arizona-fab-cost-revisited/
Generally TSMC builds oversized cleanrooms so they can add equipment as needed. Some capacity also gets redistributed/combined.
Until recently TSMC had enough capacity at older nodes to service demand and at 28nm they actually had too much for a couple of years.
Also keep in mind that if they...
TSMC reported gross margin is the weighted average of all their fabs running all their processes sold to all their customers.
- Large customers pay lower gross margins than small customers. Apple pays the lowest margins, a start up that needs a couple of engineering lots pays a much higher...
In the past Intel upgraded their Fabs to new nodes, the oldest node Intel is currently running is 32nm. it may be part of why they want to get into the foundry business, they currently have no use for older nodes but foundries do.
“Like a big party where TSMC is at the bar selling high-end drinks and sushi, but they've run out of water and orange juice, and aren't interested in getting more because the profit margins aren't good enough”
TSMC’s margin are actually higher on the older nodes, they are the cash cows that pay...
I did a deep dive on EUV supply and demand last year and based on ASML's production plans there was barely enough tools for the planned fabs. Since then there have been many new fabs announced and Micron has pulled in their EUV usage by a node. I haven't rerun the numbers yet but my gut feel is...
