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Dear Daniel, you should know better than cite a source that does not know that Intel 7nm is not the same than TSMC 7nm. I think the most unfortunate decision from Intel was to stay honest with the nm when transitioning from effective gate length to calculated gate lenth equivalent. Nearly half...
you have to do the LVS on the manufactured silicon -> therefore my term "physical", i.e. using FIB or similar methods to reconstruct the manufactured circuit structure. I am not sure how feasible this is from a technological point of view, but to my knowledge it would be the only reliable way to...
If the foundry is compromised, the jobview and similar reports from the foundry will not help. A physical LVS is the only safe solution (and you have to repeat it continuously during the time the ASIC is in production.
