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800x100 HBM2E webinar banner for smiwiki May 14 2020
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Enhancing RISC-V Vector Extensions to Accelerate Performance on ML Workloads

Enhancing RISC-V Vector Extensions to Accelerate Performance on ML Workloads
by Kalar Rajendiran on 05-17-2021 at 10:00 am

SuperCharge ML Performance

During the week of April 19th, Linley Group held its Spring Processor Conference 2021. The Linley Group has a reputation for convening excellent conferences. And this year’s spring conference was no exception. There were a number of very informative talks from various companies updating the audience on the latest research and… Read More


Enabling Edge AI Vision with RISC-V and a Silicon Platform

Enabling Edge AI Vision with RISC-V and a Silicon Platform
by Tom Simon on 03-15-2021 at 10:00 am

AI Chipset Market

AI vision processing moving to the edge is an undeniable industry trend. OpenFive, the custom silicon business unit of SiFive, discusses this trend with compelling facts in their recent paper titled “Enabling AI Vision at the Edge.” AI vision is being deployed in many applications, such as autonomous vehicles, smart cities, … Read More


SiFive Expands RISC-V Technology and its Ecosystem at the Fall Linley Processor Conference

SiFive Expands RISC-V Technology and its Ecosystem at the Fall Linley Processor Conference
by Mike Gianfagna on 11-11-2020 at 10:00 am

SiFive Expands RISC V Technology and its Ecosystem at the Fall Linley Processor Conference

 

As the Linley Fall Processor Conference winds down, there are certain presenting companies that left a lasting impression.  SiFive is one of those companies. On October 21, SiFive introduced the newest member of the SiFive Intelligence family of processor coresSiFive Intelligence family of processor cores, based on… Read More


Webinar: Build Your Next HBM2/2E Chip with SiFive

Webinar: Build Your Next HBM2/2E Chip with SiFive
by Mike Gianfagna on 05-04-2020 at 10:00 am

Screen Shot 2020 05 03 at 12.09.58 PM

I have been watching the trend for quite some time now that many advanced FinFET designs today are actually 2.5D systems in package. All of these 2.5D silicon interposer-based designs have high-bandwidth memory (HBM) stacks on board.  Often there are multiple memory stacks in both 4-high and 8-high configurations. If you follow… Read More


SiFive’s Approach to Embedding Intelligence Everywhere

SiFive’s Approach to Embedding Intelligence Everywhere
by Tom Simon on 04-27-2020 at 6:00 am

SiFive Embedding Intelligence

Before the advent of RISC-V, designers looking for embedded processors were effectively limited to a handful of proprietary processors using ISAs from decades ago. While the major ISAs are being updated and enhanced, they also are facing limitations from many decisions made over many years.  RISC-V was conceived with a clean… Read More


SiFive in a Virtual World Webinar Series 2020

SiFive in a Virtual World Webinar Series 2020
by Swamy Irrinki on 04-10-2020 at 6:00 pm

Rapid Embedded Prototyping with SiFive Software

Introducing the SiFive Connect Webinar Series –A Platform Designed for Continued Engagement with the Global Hardware and Software Community Developing RISC-V Based Semiconductor Solutions

After hosting the SiFive Tech Symposiums in a record 52 cities in 2019, it became amply evident that the RISC-V revolution has reached… Read More


Chip-to-Chip Communication for Enterprise and Cloud

Chip-to-Chip Communication for Enterprise and Cloud
by Mike Gianfagna on 04-01-2020 at 6:00 am

Screen Shot 2020 03 14 at 4.35.20 PM

I recently had the opportunity to attend a SemiWiki webinar entitled “Chip-to-Chip Communication for Enterprise and Cloud”.  The webinar was presented by SiFive and explored chip-to-chip communication strategies for a variety of applications.  In the first part of the webinar, Ketan Mehta, director of SoC IP product marketing… Read More


The First SiFive Tech Symposiums of 2020 are Fast Approaching – We’ll be in San José, Costa Rica, and Mexico City This Month

The First SiFive Tech Symposiums of 2020 are Fast Approaching – We’ll be in San José, Costa Rica, and Mexico City This Month
by Swamy Irrinki on 02-17-2020 at 10:00 am

Central America and Mexico Tour SiFive SemiWiki

We’re confirming seats for our first two SiFive Tech Symposiums in 2020. The first will take place in San José, Costa Rica on February 25, and the second will be in Mexico City, Mexico, on February 28. Just like our 2019 symposiums, these events are designed to engage the global hardware community in the RISC-V ecosystem, and to further… Read More


SiFive is Teaming with Many of the Most Prestigious Universities in South America to Engage Academia in the RISC-V Ecosystem!

SiFive is Teaming with Many of the Most Prestigious Universities in South America to Engage Academia in the RISC-V Ecosystem!
by Swamy Irrinki on 11-14-2019 at 2:00 pm

We’re confirming seats in São Paulo, Porto Alegre, Montevideo, Buenos Aires and Bucaramanga for the South American leg of our worldwide 2019 SiFive Tech Symposiums and Workshops. These five events will be focused heavily on academia, which is a key focus for SiFive. In fact, we are co-hosting these events with many of the most prestigious… Read More


The SiFive Tech Symposiums are Heading To Portland and Seattle Next Week!

The SiFive Tech Symposiums are Heading To Portland and Seattle Next Week!
by Swamy Irrinki on 10-17-2019 at 2:00 pm

We’re confirming seats in Portland and Seattle for the Pacific Northwest leg of our worldwide 2019 SiFive Tech Symposiums. We are pleased to have Mentor, A Siemens Business as our co-host, and Lauterbach, a leader in microprocessor development tools, as our partner in both cities. The Portland symposium will take place Tuesday,… Read More