WP_Term Object
(
    [term_id] => 61
    [name] => Consensia
    [slug] => consensia
    [term_group] => 0
    [term_taxonomy_id] => 61
    [taxonomy] => category
    [description] => 
    [parent] => 14433
    [count] => 11
    [filter] => raw
    [cat_ID] => 61
    [category_count] => 11
    [category_description] => 
    [cat_name] => Consensia
    [category_nicename] => consensia
    [category_parent] => 14433
    [is_post] => 
)

Optimizing Return from your IP Portfolio

Optimizing Return from your IP Portfolio
by Bernard Murphy on 12-07-2017 at 7:00 am

Given that SoC design today is predicated on IP reuse, you would assume that processes to deliver, maintain and communicate status on reusable IP should be highly optimized. But that’s not necessarily the case, especially when so many design companies have consolidated, each brings its own IP libraries, design flows, license… Read More


Finding the Right Needle in the IP Haystack

Finding the Right Needle in the IP Haystack
by Daniel Nenni on 11-13-2017 at 7:00 am

As the percentage of pre-configured IP increases in semiconductors, so design teams are able to reduce design cycle times. But one of the challenges for design teams is the inability to quickly and easily find IP because it’s incorrectly classified, sat in a designer’s home directory, or it’s been put into the ‘repository’ by an… Read More


IP Diligence

IP Diligence
by Bernard Murphy on 07-20-2017 at 12:00 pm

I hinted earlier that Consensia would introduce at DAC their comprehensive approach to IP management across the enterprise, which they call DelphIP (oracle of Delphi, applied to IP). I talked with Dave Noble, VP BizDev at Consensia to understand where this fits in the design lifecycle.


IP management means a lot of different things.… Read More


Consolidation and Design Data Management

Consolidation and Design Data Management
by Bernard Murphy on 05-30-2017 at 7:00 am

Consensia, a Dassault Systemès channel partner, recently hosted a webinar on DesignSync, a long-standing pillar of many industry design flows (count ARM, Qualcomm, Cavium and NXP among their users). A motivation for this webinar was the impact semiconductor consolidation has had on the complexity of design data management,… Read More


Webinar: Next Generation Design Data & Release Management

Webinar: Next Generation Design Data & Release Management
by Daniel Nenni on 05-12-2017 at 12:00 pm

Design Data Management (DDM) is a bit like insurance. It’s something every semiconductor company has to have, and as a result it’s probably something taken for granted. In order to make their products more useful, the DDM vendors have added more functionality to manage more of the lifecycle of design data.

Dassault’s Synchronicity… Read More


Webinar – Next Generation DDRM Needs, Solutions

Webinar – Next Generation DDRM Needs, Solutions
by Bernard Murphy on 05-02-2017 at 7:00 am

I’m a believer in product life-cycle management (PLM) for semiconductor design. It’s not an attention-grabbing topic like faster verification or improved PPA in implementation, but now massive IP-based design is routine, IP’s are sourced from multiple suppliers each cycling though multiple revisions and now that design … Read More


Synchronizing Collaboration

Synchronizing Collaboration
by Bernard Murphy on 04-12-2017 at 7:00 am

Much though some of us might wish otherwise, distributed development teams are here to stay. Modern SoC design requires strength and depth in expertise in too many domains to effectively source from one site; competitive multi-national businesses have learned they can very effectively leverage remote sites by building centers… Read More


CEO Interview: Sanjay Keswani of Consensia

CEO Interview: Sanjay Keswani of Consensia
by Daniel Nenni on 04-03-2017 at 7:00 am

Sanjay Keswani founded Consensia in 2013. He has deep experience in the high-tech industry, guiding some of the world’s high profile technology brands through complex innovation and business transformation projects including companies such as Atmel, KLA-Tencor, Hughes Aircraft, and Motorola Mobility. Consensia customers… Read More


A New Player in the Functional Verification Space

A New Player in the Functional Verification Space
by Bernard Murphy on 08-22-2016 at 7:00 am

Israel has a strong pedigree in functional verification. Among others, Verisity (an early contributor to class-based testbench design and constrained random testing) started in Israel and RocketTick (hardware-based simulation acceleration), acquired more recently by Cadence, is based in Israel. So when I hear about an … Read More