Today I had the pleasure to speak with Tom Fitzpatrick, TPC Chair for the DVCon conference and exhibition slated for February 25-28 in the heart of Silicon Valley - San Jose. Tom lives in Massachusetts, a place where I used to live and work at Wang Labs, back in the day before the PC and WordPerfect software ended Wang's fortunes. We swapped stories about the first Personal Computers, and computer languages starting from BASIC all the way up to Python.



DVCon spans four days, so ...

I started out my engineering career by doing transistor-level circuit design and we used a proprietary SPICE circuit simulator. One thing that I quickly realized was that the accuracy of my circuit simulations depended entirely on the model files and parasitics. Here we are 40 years later and the accuracy of SPICE circuit simulations still depend on the model files and parasitics, but with the added task of using 3D field solvers to get accurate parasitic values, and even the use of 3D TCAD tools to model the complex physics of nm IC designs using FinFET transistors.

Foundries and ...

2018 was the 50th year for Intel in the semiconductor business, and their Q4 2018 conference call just happened last week, so I'll get you all caught up on what they talked about. Bob Swan is the CFO and interim CEO, as the company continues to search for a new CEO after Brian K. was ousted for misconduct. Here's a quick financial summary for the Q4 2018 quarter:

• EPS of $1.28,

...

I remember working at Intel and viewing my first SPICE netlist for a DRAM chip, because there was this temperature statement with a number after it, so being a new college graduate I asked lots of questions, like, "What is that temperature value?"

My co-worker answered, "Oh, that's the estimated junction temperature ...

Intel started out as a DRAM company using planar NMOS technology, then later on added EPROM and Microprocessors to the product mix. Their CPU technology enabled the dynamic growth of the PC industry starting with the IBM PC back in 1981 and continuing all of the way to this day. They long ago dropped out of the DRAM marketplace and began to diversify their chip offerings. Intel attends the annual CES show ...

Scanning headlines of technology news every day I was somewhat familiar with the phrase "Generative Design" and even browsed the Wikipedia page to find this informative flow-chart that shows the practice of generative design.


Generative design is an iterative design process that involves a program that will generate a certain number of outputs that meet certain constraints, and a designer that will fine tune the feasible region by changing minimal and maximal values of ...

It's January so time for my annual update on all things cycling that are being shown at CES this week. For 2018 my cycling goal was 11,440 miles, but an accident on September 1st cut into my goal, however I did reach 10,887.6 miles according to Strava.



eBikes
This category continues to grow in 2019, with many vendors offering us lots of choices from commuting to mountain bikes with electric motor assist.

Halfords has embedded Alexa onto their smart computer bike at CES this year, which is a smart move because it isn't so safe to use your fingers to click a touch screen while cycling, voice control is much safer. Pricing is about ...

I started designing ICs in 1978 and continued through 1986, and each chip used hierarchy and partitioning but our methodology was totally ad-hoc, and documented on paper, so it was time consuming to make revisions to the chip or train someone else on the history or our chip, let alone re-use any portion of our chips again. Those old, manual ways of doing ...

As 2018 wraps up this month it's time to start thinking and planning for 2019, and if you work in the Silicon Valley then you'll want to consider adding the 31st annual DVCon event planned for February 25-28 in San Jose. Surveys have shown for some time now that verification tasks actually take up more time on ...