You are currently viewing SemiWiki as a guest which gives you limited access to the site. To view blog comments and experience other SemiWiki features you must be a registered member. Registration is fast, simple, and absolutely free so please, join our community today!

  • Handel Jones Predicts Process Roadmap Slips

    At the SEMI ISS conference earlier this week, the last speaker in the technology challenges section was Handel Jones of IBS. I've known Handel since the mid-1980s when he came to VLSI Technology and told us we were losing money on 90% of the designs we were doing but our cost model was not good enough and so we didn't even realize. And he was right.

    Since SEMI is focused on capital equipment and consumables (wafers, chemicals, sputter targets etc) Handel focused on what he thought the capital budgets were likely to be in the coming years. But one of the things I have learned is that if you really want to know what is going on in the fabs then ask the equipment and consumables guys. Nobody orders a $100M piece of equipment they don't need, they postpone it. Nobody orders 50,000 wafer blanks if they only need 10,000 this month. We in the semiconductor pundit segment can wonder but these guys know.

    Handel has a pretty good track record of knowing too, since he talks to everyone, they are all clients of IBS.

    Handel predicted higher growth in 2014. In 2013 most of the growth came from a doubling in memory prices. Unfortunately for the equipment industry, this was mostly because they didn't overbuild capacity and have a price war, so less equipment went in. In DRAM 3 companies have 90% of the market but the technology is mature due to difficulty in plan scaling meaning that most equipment will be transitioning older fabs to 20nm. Unless there is a new breakthrough memory technology of course. In NAND flash five companies have 90% of supply. Samsung is in the strongest position and are also building a big new fab in Xi'An (China).

    The area where Handel was more pessimistic than most reports is on processes coming online in the foundry industry. In particular, there is major uncertainty in the timing of 20nm, 16/14nm FinFETs and then 10nm.

    Article: Happy 40th birthday microprocessor-handel1-jpg
    The challenge is that demand for 16/14nm technology is concentrated within a small number of companies in 2016 and potentially 2017 too. Qualcomm and Apple being the two giants (and Samsung in their own fab). Below 32nm, nearly 3/4 of the demand in 2016 comes from mobile application processors and modems (or combined AP and modems) with demand for low power and low cost. High performance is only about 20% of the market.

    And even more challenging, the industry is trying to adopt 3 technologies in 3 years, with 28nm HKMG in Q2/2013, 20nm HKMG in Q2/2014 and 16/14nm in Q2/2016. I actually would count that as 4 years but it is aggressive either way. Even if fabs are ready, library, IP and design implementation takes 12-24 months which the design ecosystem probably cannot support.

    In processors, the market is obviously dominated by Intel who are now ramping 14nm although behind schedule. On the very day of the presentation, Intel announced they were putting fab 42 on hold and would run 14nm in the same fab as 22nm in Arizona.

    TSMC is in high volume at 28nm HKMG gate last. Revenues in Q3 2013 in 28nm were $1.8B. TSMC plans to ramp 20nm in 2014 and 16nm in 2015.

    Samsung is now in high volume with HKMG 28nm gate first with Apple as a large customer, as is Samsung themselves. They plan to ramp 20nm in 2014 and 14nm in 2015.

    GlobalFoundries is ramping fab 8 in New York with plans to ramp 20nm and 14nm where no timing has really been announced. SMIC is getting stronger and is building a new fab in Beijing. Obviously, China's wafer demand will continue to grow as mobile in particular expands dramatically. UMC is continuing with a follower strategy.

    Article: Happy 40th birthday microprocessor-handel3-jpg

    Handel had the latest version of his cost per gate trends which continues to show them going in the wrong direction. The only way to get costs down is to invest much more, perhaps $1B, in additional architectural and design work to get the design sizes down. So expect slowing of scaling to smaller feature dimensions. The key driver (or un-driver) is the difficulty in reducing cost per gate and cost per bit. Increasing capacity beyond a certain point does not give any economies of scale and will not give lower cost per bit, but will increase losses if fabs are not full.

    Article: Happy 40th birthday microprocessor-handel2-jpg

    Handel's big conclusions:
    • 28nm will have a long lifetimes with opportunities for equipment vendors to expand capacity inside China
    • 20nm parametric yield will improve and it will be a high volume technology node in 2015 but mostly 2016.
    • 16/14nm will provide low cost gates with volume production only in 2017.
    • 10nm will be postponed. Cost per gate will be prohibitive and unclear where demand will come from outside high-speed processors and FPGAs.

    <br> <a href=/cgi-bin/>More articles by Paul McLellan…</a>