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    by Published on 04-22-2019 10:00 AM
    1. Categories:
    2. Semiconductor IP,
    3. Cadence,
    4. Events
    Article: Intel and Altera Sign on for 14nm-linley_esilicon_1d.gif

    During the SoC Design Session at the just concluded Linley Spring Processor Conference in Santa Clara, Carlos Macian, Senior Director AI Strategy and Products at eSilicon, held a talk entitled ‘Opposites Attract: Customizing and Standardizing IP Platforms for ASIC ...
    by Published on 04-22-2019 05:00 AM
    1. Categories:
    2. Semiconductor Design,
    3. Mentor Graphics,
    4. Events
    Article: The New "Mobile Foundry" Era: Whose Wheelhouse?-mentor-u2u-2019-silicon-valley.jpg

    This will be one of the more interesting Mentor User Group Meetings now that the Siemens acquisition has fully taken effect and the new management team is in place. The Mentor User Conference is at the Santa Clara Marriott, Santa Clara, California on May 2, 2019 from 9:00 am to 6:00pm.

    Remember, in 2017 Siemens acquired ...
    by Published on 04-21-2019 10:00 AM
    1. Categories:
    2. Automotive,
    3. Security,
    4. 5G
    Article: Intel and Altera Sign on for 14nm-auto-shows-no-connection.jpg

    The Washington Auto Show, one of the largest auto shows in the U.S., has a problem and it is a problem shared by other auto shows in the U.S. and around the world. It is a problem that plagues the entire industry and it may spell trouble for connecting with car customers.

    I visited the Washington Auto Show last week. The event closed on Sunday. ...
    by Published on 04-21-2019 05:00 AM
    1. Categories:
    2. Semiconductor Services,
    3. Semiconductor Advisors
    Article: Intel and Altera Sign on for 14nm-tale-two-cities.jpg

    It was the best of times (for stocks)
    It was the worst of times (for memory chips)
    The disconnect between stock & chip prices

    The Venn Diagram of Stocks and Chips

    Having been involved with semiconductor and tech stocks for a long time there has always been a loose correlation between the fortunes of the industry and the fortunes of the stocks, which varies over time. Right now we are in one of those periods where the Venn diagram has ...
    by Published on 04-19-2019 10:00 AM
    1. Categories:
    2. Semiconductor Services,
    3. Events,
    4. IC Knowledge
    -10960-5-then-miracle-occurs-euv-radiolysis-resist-characterization_pdf_page_03.jpg

    At the SPIE Advanced Lithography Conference Imec presented several papers on EUV and Veeco presented about etching for EUV masks. I had the opportunity to see the presentations and speak with some of the authors. In this article I will summarize the key issues around EUV based on this research.

    EUV is ramping up into high volume 7nm production at Samsung and TSMC, and Intel plans to introduce EUV with their 7nm process next year. Although EUV is ramping for 7nm there is still a lot of room for improvement in the technology and going forward 5nm and 3nm will introduce additional challenges.
    ...
    by Published on 04-19-2019 05:00 AM
    1. Categories:
    2. Semiconductor Manufacturers,
    3. TSMC,
    4. Events
    Article: High and Low: High Level Synthesis and Low Power-2019-q1-quidence.jpg

    It's no coincidence that the TSMC Symposium is right after the Q1 earnings call. This will allow TSMC to talk more freely and they certainly will, my opinion. It is a very interesting time in the semiconductor industry and TSMC, being the bellwether, can tell us what will happen the rest of the year and give us some 2020 insights.

    TSMC CEO C.C. Wei again led ...
    by Published on 04-18-2019 10:00 AM
    1. Categories:
    2. Semiconductor IP,
    3. FPGA,
    4. Events,
    5. Flex Logix
    Article: Intel and Altera Sign on for 14nm-linley_flexlogix_1.jpg

    Dr. Cheng Wang, Co-Founder and SVP Engineering at Flex Logix, presented the second talk in the ‘AI at the Edge’ session, at the just concluded Linley Spring Processor Conference, highlighting the InferX X1 Inference Co-Processor’s high throughout, low cost, and low power. He opened by pointing out that existing inference solutions are not optimized ...
    by Published on 04-18-2019 05:00 AM
    1. Categories:
    2. Semiconductor IP,
    3. ArterisIP,
    4. IoT Internet of Things,
    5. Automotive,
    6. Artificial Intelligence
    Article: Intel and Altera Sign on for 14nm-memory-min.jpeg

    No, I’m not going to talk about in in-memory-compute architectures. There’s interesting work being done there but here I’m going to talk here about mainstream architectures for memory support in Machine Learning (ML) designs. These are still based on conventional memory ...
    by Published on 04-17-2019 10:00 AM
    1. Categories:
    2. Events
    Article: Intel and Altera Sign on for 14nm-tech-i-fig-19-dram-roadmap.jpg

    On the Sunday evening at IEDM last year, TechInsights held a reception in which Arabinda Das and Jeongdong Choe gave presentations that attracted a roomful of conference attendees.

    This is the second part of the review of Jeongdong's talk, we covered NAND flash technology in the last post. Jeongdong is a Senior Technical Fellow at TechInsights, and their subject-matter expert for memory technology. Before joining the company, he worked as a Team Lead in R&D for SK Hynix and Samsung advancing next-generation memory devices, so he knows whereof he speaks.
    ...
    by Published on 04-17-2019 05:00 AM
    1. Categories:
    2. Semiconductor Design,
    3. Cadence,
    4. Automotive,
    5. Security
    -cunningham-min.jpg

    If you’re in verification and you don’t know who Paul Cunningham is, this is a guy you need to have on your radar. Paul has risen through the Cadence ranks fast, first in synthesis and now running the verification group, responsible for about a third of Cadence revenue and a hefty percentage of ...

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