Of course, post Springsoft acquisition that includes Verdi. I've written about Verdi before, most recently when they announced Verdi3 and when they announced VIA, Verdi Interoperability Apps. Verdi is probably the industry's most widely used debug system, widely used in verification groups. Historically it has been a very open system, not restricted to any one verification environment (since SpringSoft didn't have their own simulators, emulators etc this wasn't really an option anyway).
With Synopsys acquiring Springsoft there was a worry from industry and users as to whether Verdi would continue to be an open debug platform or would Synopsys limit the interfaces to only Synopsys tools and cut out, for example, interfaces to Cadence's Palladium. This is especially important since the release of Verdi3 since much of what was new in that release was a much more open infrastructure:
- new user-interface and personalization capabilities
- open platform for interoperability and customization
- new infrastructure for performance and capacity improvements
Well, Synopsys has no such plans to restrict Verdi to Synopsys's own verification tools. It will continue with Verdi's traditional stance of complete openness (FSDB, interfaces and the Verdi Interoperability Apps still at www.via-exchange.com). In fact Synopsys is going out of their way to communicate this to the industry even running an ad campaign since last November. All pervious user flows to use Verdi with simulators, emulators, formal verification tools, model checking engines, FPGA prototyping...all these will continue to be there.
Another interesting product that Synopsys acquired with Springsoft is Certitude (which I have also written about before). This is a tool for giving feedback on just how good (or not) your verification suite is. Unlike code coverage and other similar static techniques, Certitude works by injecting bugs into your design and then seeing just how many of them your verification flow manages to detect.
Of course, for reasonable sized designs it is never possible to exhaustively simulate or even formally verify the whole design, so it remains a judgement call whether "enough" testing has been done on the RTL. But Certitude gives an objective measure of stimulus and checker completeness to support this signoff decision, along with pointers to specific holes to accelerate the closure process by directing incremental efforts to the areas requiring additional attention.
Recently Synopsys hosted a webinar on Certitude which is available for download here.
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