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  1. Tensilica
  2. Xtensa Processors Wiki

Bring Programmability to the Dataplane

Without sacrificing performance and bandwidth

Tensilica provides SOC designers with everything needed to quickly design small, low power and high-speed dataplane processors that exactly match the required application. By using Tensilica’s Xtensa dataplane processing units (DPUs), design teams can significantly reduce the development and verification time required by hand-coding RTL blocks in Verilog or VHDL. As these DPUs provide programability into the dataplane, changes can be made in firmware after silicon production that extend the life of the product as standards develop and market needs change.
All Xtensa customizable processors have two essential features:
  • Configurability - designers are offered a menu of checkbox and drop-down menu options so they can pick just the features they need - including multiple pre-verified DSP engines
  • Extensibility - designers can add their own instructions, registers, register files, and much more using the Tensilica Instruction Extension (TIE) methodology. The designer only has to specify the functional behavior of the new data path elements in the TIE language (Verilog-like) and then the RTL and whole tool chain is automatically generated.

Complete with Matching SW Tool Chain

All of the tools, including the compiler, debugger and ISS, are automatically updated to match the configuration options and any custom extensions. The matching tool set is generated by the Xtensa Processor Generator at the same time the new processor RTL is created.

Processor Cores

Xtensa LX4

Tensilica’s top-of-the-line product, Xtensa LX4 takes the configurable, extensible processor to the next level with RTL-equivalent bandwidth and highly parallel computational performance through SIMD and VLIW operations. This highly flexible processor is ideal for DSP solutions from simple Voice processing to high performance next generation LTE Baseband.
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Xtensa 9

Tensilica's Xtensa 9 provides designers with a configurable, extensible DPU that is ideally suited as a small, lower power dataplane controller. Its unique configuration options let it connect directly to RTL blocks when the system bus is too slow or already overloaded.
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Comparison


Xtensa 9Xtensa LX4
Major ISA Configuration Options
Max16YesYes
MUL16/MUL32YesYes
Floating PointYesYes
Vectra LXNot AvailableYes
HiFi 2 AudioNot AvailableYes
ConnX D2 DSP engineNot AvailableYes
ConnX Baseband EnginesNot AvailableYes
Linux MMUYesYes
Pipeline/Architecture Options
Pipeline Stages55/7
FLIX TechnologyNot AvailableYes
Processor Interface Options
PIF and XLMIYesYes
Load/Store UnitsOneOne or Two
Designer-Defined Ports and QueuesLimited Config OptionsYes

DSPs

Xtensa DSPs

You can make any Xtensa processor into the DSP of your dreams by customizing it for your application.
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ConnX DSPs

See our ConnX DSP section for a full list of our ready-made DSP options ranging from an efficient 2-MAC DSP core to the BBE64 for LTE Advanced communications.

Multimedia Solutions

HiFi Audio DSPs

Turnkey 24-bit audio for SOC designs, with multiple-codec support.
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Video

Turnkey video solutions for SOC designs, with multiple-codec support.
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Development Tools

Xtensa Processor Developers Toolkit

Tensilica has created the most advanced and powerful yet easy-to-use tools for processor customization. Tensilica’s Processor Developer’s Toolkit contains all the tools necessary to create, analyze, and build extremely high performance application-specific processors.
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Xtensa SW Developers Toolkit

If you need to develop application code for an Xtensa processor, the Xtensa Software Developer’s Toolkit (SDK) provides a comprehensive collection of code generation and analysis tools that will speed the development process.
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FPGA Prototyping

The Xtensa processor generator produces optimized, fully-placed FPGA components for any Xilinx-based SOC prototyping or hardware emulation platform.
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