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Silicon Realization
How Cadence Tackles Challenges in Silicon Realization
Holistic solutions with fundamental new architectures: design intent, design abstraction and design convergence.
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Silicon Realization Enables Next-Generation IC Design
Unified design intent and verification, higher-level design abstraction, and a top-down, bottom-up methodology for faster design convergence.
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Deterministic Path to Silicon Success
Silicon Realization has been the predominant focus of the EDA industry since its inception. But as the global electronics industry moves toward application-driven System Realization, the scope and complexity of getting a design into silicon is mushrooming.

Silicon Realization goes far beyond the traditional view of “mixed-signal” design, which typically involves the importation of hard analog macros into a digital SoC. It also involves the creation of full-custom digital, analog, and RF IP blocks and ICs. And it means integrating blocks (that were entire chips in previous process generations) into SoCs that support broad ranges of functionality.

While System Realization and SoC Realization are primarily tasks for integrators who concentrate on profitability, both design creators and integrators perform Silicon Realization, and they focus on productivity. The fundamental challenge: being able to concurrently tackle functional, electrical, and physical requirements and it use of intent, abstraction, and convergence.
Close the Productivity and Profitability Gaps
To address the needs of both design creators and integrators, EDA360 supports a number of approaches to close the productivity and profitability gaps in Silicon Realization.
  • Design convergence. The emerging application-driven approach starts with the application, defines the system, and then abstracts the hardware and software requirements from the system definition. But it’s not all top down. Information must flow upward from the silicon level as well. It’s critical to understand power, performance, and cost at the system level, and this can happen only if there is convergence. Convergence is the ability to run early-stage ‘what if’ analyses of power, performance, cost, and packaging with meaningful data. Convergence also speeds design closure, eliminates iterations, makes engineering change orders (ECOs) less disruptive, and reduces the risk of re-spins.

  • Raise the level of abstraction. The major trend in digital design and verification is transaction-level modeling (TLM). Analog designers are using behavioral modeling languages such as Verilog-AMS, and can now simulate analog circuits in a digital environment using the “wreal” data type. However it’s done, higher levels of abstraction enable greater automation of subsequent design activity, streamline the design process and, by eliminating unnecessary steps, reduce costs.

  • Apply unified design intent. A single and complete representation of design intent eliminates errors and unnecessary iterations throughout the Silicon Realization flow. Working from a common set of design constraints allows a global knowledge transfer among design teams, reduces the risk of specification misses and re-spins, and it ensures that late-stage changes are tracked and implemented correctly and consistently throughout the design process.

  • Consider software as a service. EDA360 is not just about tools and technology; it also expands into business and engagement models. Whether it’s lack of expertise or subtle differences in infrastructure, many design teams struggle to deploy an environment even when using a reference flow defined by a production partner. Using Software as a Service (SaaS) allows a design environment to be fully configured and externally hosted using either dedicated third-party servers or “cloud” computing. SaaS helps designers leverage the capabilities they need, when they need it, which boosts productivity and accelerates profitability.

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