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Thread: Question about test pattern generation

  1. #1
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    Question about test pattern generation

    Hello,

    I am going through many articles about test pattern generations. The last one i went through is "Pattern matching assisted modeling test pattern generation".
    I am new to the field of OPC. My understanding is that test pattern is essential for OPC model calibration. I see that many times that test pattern generation is associated with some sorts of pattern matching algorithm.

    What is referred exactly by test pattern generation? Is it the process of generating the test patterns using the gds layout? And why is it always associated to some sorts of algorithms to define the best test pattern generation?

    Thank you,
    Ismail

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    Hi All,

    Any answer or feedback for this question?

    Thanks,
    Ismail

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    Blogger Daniel Payne's Avatar
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    Most chips are digital in nature and for those digital portions you want to send enough stimulus through to detect any manufacturing flaws (i.e. faults). An engineer can sit down and try to come up with a set of manual test stimulus that will uncover faults, or in a fraction of the time we can have software automatically generate stimulus to uncover faults. Software called Automatic Test Pattern Generation (ATPG) does exactly that, it automatically creates stimulus (i.e. Input patterns) to detect the maximum number of faults in the least amount of time.

    OPC is Optical Proximity Correction and is not related to ATPG or Design For Test (DFT).

    Does that clarify things a bit?

    What is your background?

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    Daniel Payne, EDA Consultant
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  4. #4
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    Quote Originally Posted by Daniel Payne View Post
    OPC is Optical Proximity Correction and is not related to ATPG or Design For Test (DFT).
    May want to add that OPC is based on models and the calibration of these models is done by test patterns; e.g. test patterns are put on the mask and then printed on the wafer. The resulting patterns in resist and/or after etch or other processing steps are then measured. These measurements are then used for calibrating the OPC model. The art is now to come up with a set a test patterns that maximizes the resulting model quality with the measurement effort minimized.

    So for OPC also test pattern generators exists but this is a totally different beast than the digital ATPG.

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    Blogger Daniel Payne's Avatar
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    Staf,

    Good point. It wasn't clear from the context which "test pattern generation" domain he was referring to.

    My brain immediately went to DFT and ATPG, but re-reading the original question it now seems likely that he was talking about test pattern generation for OPC instead.

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