Hello All,

We are hiring for a key skill set to our next Gen chip. Please feel to contact me direct if you have interest-neal.cordell@roche.com. The role is based in Santa Clara, CA

Design Verification Engineer, supporting the Roche DNA Sequencing unit, you will be responsible for all aspects of the verification of Roche's silicon chips, including block-level and chip-level functional test plan development, test bench and models creation, detailed verification of every aspect of the chip functionality including digital, DFT, and AMS verification. In addition you will engage in other aspects of chip verification, including front-end architecture planning, system modeling, Analog/Mixed-Signal verification strategy and coordination, external IP verification integration, flow development, and EDA tool evaluation and selection.



Additional responsibilities include working with different groups and actively participating in development activities beyond chip design to ensure the success of Roche's roadmap. In a small, dynamic, and highly team-oriented environment, you are expected to be able to apply your expertise to help seamlessly integrate chip functional and test design verification activities with Design Architecture, Physical Design, System, and software processes and flows.

Key Roles and Responsibilities:

  • Ownership of all aspect of the design verification of the chip top and/or its functional blocks and IP
  • Ownership of system, chip, and IP models and transactors for verification
  • Evaluation and selection of flows and EDA tools
  • Development and deployment of processes and flows for Design Verification
  • Test Plan ownership, and coordination with Architecture, Design, DFT, and other teams to deliver a complete, comprehensive verification plan