I represent Talent Acquisition team at Cypress semiconductor, Bangalore. If you have not heard about Cypress here is an opportunity to know us better, we are hiring Physical Design rock stars.
Cypress’ advanced system-level solutions are Embedded in Tomorrow™. We target markets growing faster than the broader semiconductor industry, including automotive, industrial and consumer electronics markets. Our world-class, secure wireless technology—along with our MCUs, memories, analog ICs and USB controllers—give us an unparalleled competitive advantage in the Internet of Things, and a jump on emerging markets, including connected appliances and autonomous cars.
Our customers are smart, aggressive, out-of-the-box thinkers who create disruptive, game-changing products, revolutionize markets and change our connected world for the better. With more than 30 years of industry experience, we provide them with a turnkey path to new products, new markets and new revenue.
We focus our technology and capital investments on growth markets and our core semiconductor businesses to relentlessly drive margin improvement and profitable growth. We are focused on creating value and returning capital to our shareholders.
From the entrepreneur building a revolutionary new product in a garage to the Fortune 500 engineering team tasked with making the impossible happen now, Cypress is today’s technology partner for tomorrow’s innovations.
To learn more about Cypress, go to www.cypress.com
1. This position is for Physical Design and Timing Closure of complex, low power SoCs targeted for IOT markets.
2. Candidate will work on various stages of physical design implementation which includes floorplanning, power grid design, place and route, clock tree synthesis, timing closure, physical verification checks.
3. Candidate is expected to have deep understanding of low power design techniques.
4. Candidate will be responsible to achieve die area, performance, power goals for blocks/top.
Job Specific Requirements:
1. B.E./B.Tech. with 7-9 years of experience or M.E./MTech. with 5-7 years of experience and specialization in VLSI design
2. Hands-on experience in physical design and timing closure of large blocks
3. Experience of industry standard tools for physical design and signoff
4. Experience in scripting languages (shell, perl, tcl) and Make flow
5. Understanding of 40nm/28nm technologies and associated physical design challenges
6. Must be a good team player and should have desire to learn and explore
We are also hiring in:
STA/Timing Constraints, DFT, SoC Verification(System Verilog), SoC Design(Verilog/VHDL), MAC, PHY etc. Please visit jobs.cypress.com for more openings. I can be reached at firstname.lastname@example.org