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Thread: Semis and Semi Tech Growing Diversity and the FBC Factor (faster, better, cheaper)

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    Semis and Semi Tech Growing Diversity and the FBC Factor (faster, better, cheaper)

    Although growth in some semi areas and fields have slowing growth, semis and especially semi technology are becoming much more diverse, actually increasing the growth curve on a scale unmatched by almost any other industry. Solar, display, MEMs, sensors, power sources(light, magnetic waves, sound, laser and many others) have all added to the penetration of semis and semi technology into almost everything and this penetration is just in its early stages. Semis and semi technology have given us a library of nanotechnology of unparalleled scope, breadth, size and diversity in which all four of these characteristics are expanding at an ever increasing rate that is the result of the semi sector philosophy and application of Faster, Better, Cheaper on a scale no endeavor of man has ever seen before.

    As fast as new devices come out and Faster, Better, Cheaper takes hold, the market for these technologies and devices increases at the same rate as what I will call the FBC factor that the semi industry has been able to accelerate at a level unmatched by any other industry. We will see semis, semi technologies and the FBC factor touch everything in the physical world and the world of communication, research and education/training.

    Medical, robotics, autonomous devices of all types, monitoring and controlling everything, all promise to be very large new mega markets. The run for semis and semi technologies is still in its early stages and is already changing everything we touch.

    The tripling of R&D spending to 100B/yr in just five years by Apple, Alphabet, Microsoft, Amazon and Facebook, plus the massive R&D spending by other companies and institutions will push new and existing markets for tech in ways we can barely imagine. The rate of change in semis and semi technology will only pick up speed in not only products, but implementation.

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    Last edited by Arthur Hanson; 06-12-2017 at 06:36 PM.
     

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    Blogger Daniel Payne's Avatar
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    Arthur,

    Many engineering teams have come to realize that the 28nm process node was the last node that had "cheaper transistors", so that has limited the number of companies that can afford to design at sub-28nm process nodes, mostly the largest companies that can afford to do this for an SoC:

    • 28nm, $30M
    • 14nm, $80M
    • 7nm, $271M
    • 5nm, $500M

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    Quote Originally Posted by Daniel Payne View Post
    Arthur,

    Many engineering teams have come to realize that the 28nm process node was the last node that had "cheaper transistors", so that has limited the number of companies that can afford to design at sub-28nm process nodes, mostly the largest companies that can afford to do this for an SoC:

    • 28nm, $30M
    • 14nm, $80M
    • 7nm, $271M
    • 5nm, $500M
    Those numbers are often quoted but are kind of deceptive -- if you use the more advanced technology to cram 4x as much onto a piece of silicon the same size, then the costs do go up astronomically like this. If you use the technology to get the same functionality at lower power and cost the increase is much smaller than this -- and the "transistor cost has stopped falling" meme isn't true either, it was for 14/16nm FinFET because this cost more to make than 20nm planar but gave the same density, but the drop has now resumed at 10nm/7nm because density is still increasing faster than wafer cost.

    It's certainly true that the difficulty of design and NRE cost are higher for each node so 28nm/22nm is the last "low-cost" node from this point of view, and the latest nodes are effectively unaffordable to small companies with lower volume requirements which is why the number of users is dropping rapidly each node. But so long are there are enough big-volume customers with deep pockets to fill the fabs, new nodes will carry on being developed even if they're inaccessible to more and more users.

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    Admin Daniel Nenni's Avatar
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    Quote Originally Posted by Daniel Payne View Post
    Arthur,

    Many engineering teams have come to realize that the 28nm process node was the last node that had "cheaper transistors", so that has limited the number of companies that can afford to design at sub-28nm process nodes, mostly the largest companies that can afford to do this for an SoC:

    • 28nm, $30M
    • 14nm, $80M
    • 7nm, $271M
    • 5nm, $500M
    You also have to factor in the technology. FinFETs are more expensive than FD-SOI. In fact, 22FDX could be the last cheapest node to design to.

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    D.A.N.

    Good point, I agree that the FD-SOI technology at 22nm looks cost-effective when compared to FinFET technology.

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    The price of displays, computational power, storage, solar cells and everything else produced by semis and semi technology is coming down on a cost for performance basis. It is this ethos that the semi/nanotech sector has brought the FBC factor to almost everything it touches, even if some of the cost of some sub components go up, the end result is still that the cost for performance equation has gone down and will continue to go down even if the devices are far more expensive. Even though true super computational power and software is expensive, the cloud has brought the cost down for this power through far more efficient utilization of the resources. I would like to see this applied to medical equipment, such as MRI's which are only utilized a few hours a day, when the cost could be dramatically lowered through greatly increased use. This could be done currently with demand pricing at different hours with peak hours costing full price with middle of the night hours being cheaper. The AWS model should be applied to medical to lower the insane cost and low quality of US medical. The ethos of the semi/nanotech model of the FBC factor should be applied to all medical equipment and the operating structure ethos of AWS should be applied to medical in general. Already AI/ML are performing many diagnostic analysis better than even the best doctors and far better than the average doctor.

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    Last edited by Arthur Hanson; 06-13-2017 at 04:50 AM.
     

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    Quote Originally Posted by Daniel Nenni View Post
    You also have to factor in the technology. FinFETs are more expensive than FD-SOI. In fact, 22FDX could be the last cheapest node to design to.
    FDSOI is typically lower cost because it uses lower density in the metal interconnects and thus avoids double patterning; it's not lower cost because of the transistor itself.

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    I think Samsung is making the cheapest finfets but it remains a process for the few, not the many. 28nm is the process for the many.

    This whole industry right now is a like a swimming pool, with a crowd on the edge (28nm), with the edge getting more and more crowded...Inside the pool (14nm and below) you have just a few swimmers.

    In the 22FDX pool, I don't see any swimmers.

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    Quote Originally Posted by benb View Post
    I think Samsung is making the cheapest finfets but it remains a process for the few, not the many.
    Agreed, but that is a long time trend with already automotive FABs like XFAB and On-Semi that are doing .18um/0.13um as their most advanced node.

    Quote Originally Posted by benb View Post
    28nm is the process for the many.
    I would claim 28nm, 65nm and 180nm are the nodes of the many. Here at imec the latter two are still big nodes for low-volume applications.

    Quote Originally Posted by benb View Post
    In the 22FDX pool, I don't see any swimmers.
    I'm not into this so I can't judge. I would think FDSOI has advantages for designs with big analog/mixed-signal content.

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    Quote Originally Posted by Staf_Verhaegen View Post
    Agreed, but that is a long time trend with already automotive FABs like XFAB and On-Semi that are doing .18um/0.13um as their most advanced node.



    I would claim 28nm, 65nm and 180nm are the nodes of the many. Here at imec the latter two are still big nodes for low-volume applications.



    I'm not into this so I can't judge. I would think FDSOI has advantages for designs with big analog/mixed-signal content.
    Also digital content where power consumption is important -- FDSOI capacitance (dynamic power) is lower, and using back biasing leakage (static power) can also be lower. If BB is also used to tune out process variation, circuits can use more low-Vth transistors without leakage in the fast corner becoming a problem, so Vdd can be lowered below what is realistically possible with FinFET, giving lower dynamic power (at the expense of some speed).

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