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Thread: Qualcomm commits to TSMC 7nm

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    Qualcomm commits to TSMC 7nm

    Qualcomm’s Snapdragon 855 Will Be Manufactured Using TSMC’s 7nm Node; Chip Giant Will Return To Samsung In 2019

    My thoughts:
    - TSMC, GF in the lead on 7/10nm (5x nm CPP), Samsung and Intel a step (or two) behind
    - Can Samsung Foundry survive the loss of Qualcomm?

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    Samsung bet ill advisedly on EUV based 7LPP and its paying for that strategic blunder with the loss of QCOM business at the leading edge in 2019. I still think if Samsung uses its investment in EUV to accelerate 5nm/4nm they could recover from this setback. SS has deep pockets to survive such setbacks and can persist with foundry efforts in the long run. What SS needs is more pragmatic technology choices / decisions and competing on all aspects going forward. Time to market is critical and SS should use this lesson to improve execution at future nodes. If SS can deliver 4nm GAA in 2020 for risk production and 2021 for HVM they would do quite well.

    Beyond 7nm - the race to 4nm is Samsung's to lose - Android Authority

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    Quote Originally Posted by raghu78 View Post
    Samsung bet ill advisedly on EUV based 7LPP and its paying for that strategic blunder with the loss of QCOM business at the leading edge in 2019. I still think if Samsung uses its investment in EUV to accelerate 5nm/4nm they could recover from this setback. SS has deep pockets to survive such setbacks and can persist In the long run. What SS needs is more pragmatic technology choices / decisions and competing on all aspects going forward. Time to market is critical and SS should use this lesson to improve execution at future nodes. If SS can deliver 4nm GAA in 2020 for risk production and 2021 for HVM they would do quite well.

    Beyond 7nm - the race to 4nm is Samsung's to lose - Android Authority

    QCOM is using TSMC 7nm for SoCs and modems which have already been taped-out and now they are back at Samsung. QCOM is the quintessential fabless company and will go where the best Ts&Cs are, absolutely. That will change of course when Broadcom acquires Qualcomm. Hock Tan is a TSMC fan all the way....

    Samsung has a culture problem in doing whatever it takes to be first, even if that means misleading customers and eating wafer costs due to low yield or production delays. Samsung will be the first to EUV but what will that really get them other than a conference paper or two? Thankfully Samsung is making money on memory hand-over-fist because I highly doubt their foundry business will ever make a profit moving forward. Same for Intel for different reasons of course.

    So the foundry / top customer landscape is: TSMC/Apple, GF/AMD, SS/SS, and Intel/Intel leaving QCOM to play the field. Just my opinion of course...

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    Samsung has 8nm but that may not be competitive enough against TSMC/GF 7nm. Best hope of recovery would be something like "7LPE" which doesn't use EUV, but at this point, it looks too late to develop that.

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    If Qualcomm switches to TSMC again they will lose Samsumg as customer for their chips so it doesn't make sense to go for TSMC's 7nm for a bit better PPA if you lose your biggest customer. They don't have any competition in the Android high end SOC market so they don't have to be that aggressive with the risk of losing money.

    Also going for TSMC 7nm will be more expensive and harder than just use SS 8nm that will have more free wafers ( Apple, big GPUs, and maybe Huawei will suck almost all the volume of TSMC) and it is based on their existing 10nm so they got more experience to desing on that node so they don't have to re-learn TSMC's 7nm.

    “ 8LPP will have a fast ramp since it uses proven 10nm process technology while providing better performance and scalability than current 10nm-based products ” said RK Chunduru, Senior Vice President of Qualcomm.

    Edit: Not to forget TSMC has under-delivered in their targets of Performance and Power in their 10/7FF processes.

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    Quote Originally Posted by Lodix View Post
    If Qualcomm switches to TSMC again they will lose Samsumg as customer for their chips so it doesn't make sense to go for TSMC's 7nm for a bit better PPA if you lose your biggest customer. They don't have any competition in the Android high end SOC market so they don't have to be that aggressive with the risk of losing money.

    Also going for TSMC 7nm will be more expensive and harder than just use SS 8nm that will have more free wafers ( Apple, big GPUs, and maybe Huawei will suck almost all the volume of TSMC) and it is based on their existing 10nm so they got more experience to desing on that node so they don't have to re-learn TSMC's 7nm.

    “ 8LPP will have a fast ramp since it uses proven 10nm process technology while providing better performance and scalability than current 10nm-based products ” said RK Chunduru, Senior Vice President of Qualcomm.

    Edit: Not to forget TSMC has under-delivered in their targets of Performance and Power in their 10/7FF processes.
    TSMC has under-delivered 7ff? Do tell...

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    Quote Originally Posted by Daniel Nenni View Post
    TSMC has under-delivered 7ff? Do tell...
    10FF was supposed to bring 22% better performance and 40% lower power consumption. Now they have changed it in their website to 15% and 35%. And Huawei claims that in reality it only brings 20% lower power consumption compared to 16FF+. Also the products launched this year using this node didn't bring meaningful improvements in efficiency ( A11, Kirin970 ) compared to Qualcomm and Samsung with their 10nmLPE over 14nmLPP.

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    Quote Originally Posted by Lodix View Post
    10FF was supposed to bring 22% better performance and 40% lower power consumption. Now they have changed it in their website to 15% and 35%. And Huawei claims that in reality it only brings 20% lower power consumption compared to 16FF+. Also the products launched this year using this node didn't bring meaningful improvements in efficiency ( A11, Kirin970 ) compared to Qualcomm and Samsung with their 10nmLPE over 14nmLPP.
    Again, TSMC has under-delivered 7ff? Do tell...

    Let's not forget that the Apple A11 is TSMC 10nm and it is the leading SoC. Same as 20nm. QCOM whiffed at TSMC 20nm but Apple did amazingly well. The iPhone 6 is one of my favorite phones...

    So what does Apple know about designing SoCs that the others don't? First and foremost Apple knows how to partner with a foundry (they write very big checks). 20nm and 10nm were built hand-in-hand with Apple specifically for Apple. With FinFETs the process secret sauce is everything and only the trusted few will have full access to it. If you are on the outside like QCOM and Huawei you are fighting with one hand tied behind your back, absolutely.

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    Daniel, you keep asserting that Broadcom "will" acquire Qualcomm. You are very informed and connected in general, but could not be more wrong about this claim.

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    Quote Originally Posted by JeffreyHF View Post
    Daniel, you keep asserting that Broadcom "will" acquire Qualcomm. You are very informed and connected in general, but could not be more wrong about this claim.
    It's just my opinion and also the opinion of 2,200 others....

    Broadcom buying Qualcomm just won't happen? (Poll)

    I have met Hock Tan and heard him speak on several occasions and I would never bet against him, absolutely.

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    This has nothing to do with Hock Tan, and everything to do with Qualcomm. You continue to underestimate them.

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    Quote Originally Posted by Daniel Nenni View Post
    TSMC has under-delivered 7ff? Do tell...
    TSMC seems to have cut back on performance improvement claims for N7 between Mar 2017 and Sep 2017. They may have done so for time to market reasons. TSMC went from 35% higher perf for N7 vs 16FF+ to 30% higher perf for N7+ with EUV vs 16FFC . N7+ with EUV is expected to be 8-10% faster than N7 at same power/complexity. This would mean N7 is just 20% higher perf vs 16FFC compared to earlier claims of 35% higher perf at same power/complexity. afaik 16FFC is a cost optimized version of 16FF+ with same performance.

    https://www.eetimes.com/document.asp...&page_number=3

    "TSMC will start risk production on its first-generation 7nm process next month. It expects in May the first of 12 tapeouts in the process this year, and a total of about 20 tapeouts in the first 12 months. The process should deliver 3.3x greater routed gate density and either 35 percent more speed or 60 percent less power than the foundrys 16FF+ node. The process includes new cell libraries, cache macros and serdes."

    https://www.eetimes.com/document.asp...&page_number=1

    "TSMC sketched out what it called a relatively simple process of porting design rules and IP to an N7+ process using EUV that it could put into production in 2019. The process can deliver 20% greater density, 810% higher speeds, or 1520% less power than its current N7 node. Compared to its 16FFC process, N7+ can enable 30% higher speed or 50% less power on an ARM A72 core, said Cliff Hou, vice president of R&D for design technology at TSMC."

    https://www.eetimes.com/document.asp...&page_number=2

    "However, some of the results were less impressive than what TSMC estimated back in March, said Mike Demler, senior analyst at the Linley Group. The number of 7-nm tape outs and its performance gains, as well as power savings on 22ULP and performance gains with 12FFC, were all slightly lower than the foundry predicted six months ago, he said."

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    Do you really feel comfortable quoting EETimes? Especially Rick Merrit who is known to have an axe to grind with TSMC. He works off Power Point slides not actual silicon data, right?

    At the TSMC events expectations are always set a high so the worker bees will do everything possible to achieve them. This is Morris Chang Management 101. Look back at 28nm, 20nm, and 16nm... it is deja vu all over again.

    And the formula variables really are: Power, Performance, Area, Yield, and Time-to-Market. Unlike Intel and Samsung, TSMC has some very big customers that will not allow delays so Time-to-Market really is not a "variable". Since Intel and Samsung are their own big customers that is not the case.

    What I do is ask people I know at TSMC's top customers and the IP companies that are in the TSMC inner circle (Synopsys/ARM) and SERDES providers. They all have IP on the first test chips. The question is: Does the silicon meet expectations? And the answers almost never match what EETimes publishes. If it did then they would not get a lot of clicks, right? Just like bashing Intel on SemiWiki...

    So go ahead and bash TSMC for "under delivering" as long as you realize that is not how the foundry business really works.



    Quote Originally Posted by raghu78 View Post
    TSMC seems to have cut back on performance improvement claims for N7 between Mar 2017 and Sep 2017. They may have done so for time to market reasons. TSMC went from 35% higher perf for N7 vs 16FF+ to 30% higher perf for N7+ with EUV vs 16FFC . N7+ with EUV is expected to be 8-10% faster than N7 at same power/complexity. This would mean N7 is just 20% higher perf vs 16FFC compared to earlier claims of 35% higher perf at same power/complexity. afaik 16FFC is a cost optimized version of 16FF+ with same performance.

    https://www.eetimes.com/document.asp...&page_number=3

    "TSMC will start risk production on its first-generation 7nm process next month. It expects in May the first of 12 tapeouts in the process this year, and a total of about 20 tapeouts in the first 12 months. The process should deliver 3.3x greater routed gate density and either 35 percent more speed or 60 percent less power than the foundrys 16FF+ node. The process includes new cell libraries, cache macros and serdes."

    https://www.eetimes.com/document.asp...&page_number=1

    "TSMC sketched out what it called a relatively simple process of porting design rules and IP to an N7+ process using EUV that it could put into production in 2019. The process can deliver 20% greater density, 810% higher speeds, or 1520% less power than its current N7 node. Compared to its 16FFC process, N7+ can enable 30% higher speed or 50% less power on an ARM A72 core, said Cliff Hou, vice president of R&D for design technology at TSMC."

    https://www.eetimes.com/document.asp...&page_number=2

    "However, some of the results were less impressive than what TSMC estimated back in March, said Mike Demler, senior analyst at the Linley Group. The number of 7-nm tape outs and its performance gains, as well as power savings on 22ULP and performance gains with 12FFC, were all slightly lower than the foundry predicted six months ago, he said."

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    Quote Originally Posted by Daniel Nenni View Post
    Do you really feel comfortable quoting EETimes? Especially Rick Merrit who is known to have an axe to grind with TSMC. He works of Power Point slides not actual silicon data, right?

    At the TSMC events expectations are always set a high so the worker bees will do everything possible to achieve them. This is Morris Chang Management 101. Look back at 28nm, 20nm, and 16nm... it is deja vu all over again.

    And the formula variables really are: Power, Performance, Area, Yield, and Time-to-Market. Unlike Intel and Samsung, TSMC has some very big customers that will not allow delays so Time-to-Market really is not a "variable". Since Intel and Samsung are their own big customers that is not the case.

    What I do is ask people I know at TSMC's top customers and the IP companies that are in the TSMC inner circle (Synopsys/ARM) and SERDES providers. They all have IP on the first test chips. The question is: Does the silicon meet expectations? And the answers almost never match what EETimes publishes. If it did then they would not get a lot of clicks, right? Just like bashing Intel on SemiWiki...

    So go ahead and bash TSMC for "under delivering" as long as you realize that is not how the foundry business really works.
    Daniel, I am not bashing TSMC. I am quoting eetimes who in turn are referring to TSMC perf claims from Mar and Sep 2017. btw I understand that TSMC is more time to market driven than Intel or Samsung. But still there seems to have been a cut back from the earlier perf claims. Are you saying that TSMC did not make the perf claims as stated by eetimes in March and Sep 2017. If thats the case then you are saying eetimes is spreading lies which I find hard to believe. If the mighty Intel is facing performance issues at 10nm according to few like David Schor (wikichip) and charlie (semiaccurate) I do not find it hard to believe that TSMC is faced with the same problems of increasing performance while shrinking transistors.

    Charlie Demerjian on Twitter: "@DanMatte @IanCutress @witeken @TMFChipFool @david_schor Moore's law seems alive enough here, performance gains might be coughing blood though."

    "Moore's law seems alive enough here, performance gains might be coughing blood though."

    This is something which Gary Patton acknowledges as the hardest problem at foundry 7nm and below. Increasing performance is the toughest challenge while increasing density seems to be simpler, atleast relatively, in comparison.

    Semiconductor Engineering .:. To 7nm And Beyond

    SE: What do you see as the big problem in chips going forward?
    Patton: These future nodes are becoming more dominated by middle- and back-end of line resistance/capacitance. But the worst case corner is going to limit what can be achieved from a performance perspective.

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    I probably understand what is confusing you.

    It is comparison of performance improvement while power remains same (or power consumption at same performance respectively) and here comes problem. Older nodes are still evolving (improving) and here is problem. 16FFC did not bring significant performance improvement over 16FF but there is some power improvements. This better consumption at same performance might be translated into higher performance at same power which changes your baseline even when maximum performance remains similar. Probably this might confuse you.

    Btw.: Apple's 10nm A11 SOC brings some interesting improvements. There is double digit performance improvement in both CPU and GPU cores. Plus they added AI oriented DSP with performance around 600 GFlops IIRC, which is pretty nice considering that TDP remains similar.

    Apple A11 - Wikipedia

    Regarding 7nm. Recently I heard some news from "miners" and they looked to be pretty happy about it. Also, as mentioned above, there is lot of news from IP providers about serdes, PLLs, DDR... IPs which is IMO good sign about performance. And don't forget that there is probably 50 tape-outs ready IIRC so soon we will have some real world data publicly available. That means there is no reason to speculate about under-delivering here.

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    Quote Originally Posted by raghu78 View Post
    Daniel, I am not bashing TSMC. I am quoting eetimes who in turn are referring to TSMC perf claims from Mar and Sep 2017. btw I understand that TSMC is more time to market driven than Intel or Samsung. But still there seems to have been a cut back from the earlier perf claims. Are you saying that TSMC did not make the perf claims as stated by eetimes in March and Sep 2017. If thats the case then you are saying eetimes is spreading lies which I find hard to believe. If the mighty Intel is facing performance issues at 10nm according to few like David Schor (wikichip) and charlie (semiaccurate) I do not find it hard to believe that TSMC is faced with the same problems of increasing performance while shrinking transistors.

    Charlie Demerjian on Twitter: "@DanMatte @IanCutress @witeken @TMFChipFool @david_schor Moore's law seems alive enough here, performance gains might be coughing blood though."
    TSMC presents "targets" at the symposiums not specs based on production chips. Until the PDK is 1.0 (production) you can only talk targets unless you have test chip data which requires an NDA. And test chip data only tells part of the story. Production chips like the A11 tell the complete TSMC 10nm story and it is a good one, absolutely.

    If you want to look at the process level specs read Scott Jones because he is the gold standard:

    https://www.semiwiki.com/forum/conte...ones-7697.html

    What you will find is that TSMC 7nm is comparable to GF 7nm and Intel 10nm. Last I heard TSMC 7nm will be in production in 1H 2018 and Intel 10nm and GF 7nm in 2H 2018.

    About your sources: TMFChipFool has zero semiconductor experience. Ian Cutress zero semiconductor experience. Charlie Demerjian spent some time at Intel many many years ago but has zero foundry experience. And here is my problem with Rick Merrit: He is supposed to be a professional journalist. I have seen him take and publish pictures at events that clearly state no photos. He also blurs the line between fact and opinion with personal bias. So yes I am saying the mainstream media routinely spreads misinformation which should not surprise you.

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    As I said, QCOM has ALREADY taped-out at TSMC 7nm. Past tense, already happened, done deal.


    Quote Originally Posted by Lodix View Post
    If Qualcomm switches to TSMC again they will lose Samsumg as customer for their chips so it doesn't make sense to go for TSMC's 7nm for a bit better PPA if you lose your biggest customer. They don't have any competition in the Android high end SOC market so they don't have to be that aggressive with the risk of losing money.

    Also going for TSMC 7nm will be more expensive and harder than just use SS 8nm that will have more free wafers ( Apple, big GPUs, and maybe Huawei will suck almost all the volume of TSMC) and it is based on their existing 10nm so they got more experience to desing on that node so they don't have to re-learn TSMC's 7nm.

    8LPP will have a fast ramp since it uses proven 10nm process technology while providing better performance and scalability than current 10nm-based products said RK Chunduru, Senior Vice President of Qualcomm.

    Edit: Not to forget TSMC has under-delivered in their targets of Performance and Power in their 10/7FF processes.

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    Quote Originally Posted by JeffreyHF View Post
    This has nothing to do with Hock Tan, and everything to do with Qualcomm. You continue to underestimate them.
    What about the QCOM investors? Do they have a say in it? If Hock offers $100 per share management will have no choice.

    Check out the QCOM chapter in our book Mobile Unleashed if you are interested in the history of QCOM:

    https://www.semiwiki.com/forum/conte...ory-arm-e.html

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    $100/share is moot, because Tan's over-leveraged financial house of cards can't raise that kind of cash, and institutional investors won't sell this unique company for $60/share in cash, and $40/share in AVGO funny money. Tan hopes to steal QCOM on the cheap, with $60/cash and $20/AVGO. That won't even tempt most institutional shareholders, who control 78+% of the company.

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    Quote Originally Posted by Daniel Nenni View Post
    TSMC presents "targets" at the symposiums not specs based on production chips. Until the PDK is 1.0 (production) you can only talk targets unless you have test chip data which requires an NDA. And test chip data only tells part of the story. Production chips like the A11 tell the complete TSMC 10nm story and it is a good one, absolutely.

    If you want to look at the process level specs read Scott Jones because he is the gold standard:

    https://www.semiwiki.com/forum/conte...ones-7697.html

    What you will find is that TSMC 7nm is comparable to GF 7nm and Intel 10nm. Last I heard TSMC 7nm will be in production in 1H 2018 and Intel 10nm and GF 7nm in 2H 2018.

    About your sources: TMFChipFool has zero semiconductor experience. Ian Cutress zero semiconductor experience. Charlie Demerjian spent some time at Intel many many years ago but has zero foundry experience. And here is my problem with Rick Merrit: He is supposed to be a professional journalist. I have seen him take and publish pictures at events that clearly state no photos. He also blurs the line between fact and opinion with personal bias. So yes I am saying the mainstream media routinely spreads misinformation which should not surprise you.
    Thanks for the clarification. btw TSMC hitting HVM ramp in Q1 2018 sounds very achievable since they have been in risk production from Apr 2017 and recently TSMC said in their Q3 earnings call that they have moved 7nm from R&D to manufacturing which I assume means moving 7nm from risk to the start of high volume production.

    http://www.tsmc.com/uploadfile/ir/qu...transcript.pdf

    "Now, let me move to N7 and N7+. N7 been transferred from R&D to manufacturing in early third quarter this year. Right now, our efforts focus on defect reduction and fine-tuning device performance to prepare for mass production in the first half of 2018.We expect the yield learning in N7 to benefit greatly from N10 and our progress so far has been on schedule. The initial application for N7are high-end application processors and high-performance computing. We are working with major customers for their products to be introduced in 2018. We expect more than 50 tape-outs by the end of 2018"


    Since Apple is looking at A11x for 2018 iPad to be manufactured at 7nm and ship by mid-2018 , I think the TSMC N7 HVM ramp is well underway and we will see production chips start to ship to Apple supply chain by the end of Q1 2018 or early-mid Q2 2018. On the topic of GF 7nm they are still yet to start risk production and have stated risk production before mid-2018, which I assume means Q2 2018. I have my doubts as to whether GF 7nm HVM ramp can happen even by late 2018. imo I think GF 7LP HVM ramp is more a Q1 2019 event and I think TSMC has a solid 1 year time to market lead over GF 7nm. As for Intel well I am hearing the worst rumours and that their 10nm could slip into 2019 and that Cannonlake might be produced in very small volume in H2 2018 or be totally scrapped. Icelake on 10+ in H1 2019 seems to be the first real high volume product from Intel on 10nm process. I would like to hear your thoughts on when GF could ramp 7LP to HVM and what you are hearing on Intel 10nm too.

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