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    by Published on 06-25-2018 07:45 AM
    1. Categories:
    2. Semiconductor Design,
    3. Cadence,
    4. Events
    Most of the re-spins are due to Functional defects?-cacence-cloud-slide.jpg

    The first clue was cloud vendors (Amazon, Google, IBM, etc…) at 55DAC for the first time ever with lots of cloud content including a Design on Cloud Pavilion. The second clue was the pre-briefing from Cadence last week. There has also been a lot of cloud chatter in the semiconductor ecosystem ...
    by Published on 06-25-2018 05:00 AM
    1. Categories:
    2. Semiconductor Manufacturers,
    3. GlobalFoundries,
    4. Intel,
    5. STMicroelectronics,
    6. TSMC,
    7. Samsung Foundry,
    8. FinFET
    Article: Is the RTL Design Flow Broken?-slide2.jpg

    There has been a lot of new information available about the leading-edge logic processes lately. Papers from IEDM in December 2017, VLSIT this month, the TSMC and Samsung Foundry forums, etc. have all filled in a lot of information. In this article I will summarize what is currently known.
    ...
    by Published on 06-24-2018 01:00 PM
    1. Categories:
    2. Semiconductor Services,
    3. Semiconductor Manufacturers,
    4. Semiconductor Advisors
    CES 2013 Trip Reports (Win an iPad Mini!)-world-fab-forecast-2018.jpg

    It appears the current cycle has rolled over? The reason is memory & could be worsened by trade Figuring out length, depth and impact of the downturn? We had said that AMAT "called" the top of the cycle on their last conference call even though they may not think so. Semiconductor cycles always ends the same way. The rate of increase slows to zero then rolls over as business slows and the cycle goes down.
    ...
    by Published on 06-22-2018 07:00 AM
    1. Categories:
    2. Semiconductor Design,
    3. Mentor Graphics,
    4. Events
    GSA 3D IC Working Group Meeting | January 23, 2013-dac55-logo.jpg

    It's hard to believe that this is the 55th DAC and even harder to believe that this will be my 35th. So much has changed in 35 years, with DAC back in San Francisco I expect a VERY big crowd and even bigger announcements, absolutely.

    Not only is this an epic time for semiconductors, I would say that EDA is exciting again and the Mentor acquisition by Siemens is definitely a catalyst. Being that this is the first DAC ...
    by Published on 06-22-2018 05:00 AM
    1. Categories:
    2. Wally Rhines
    Which way the semiconductor industry is going?-wally_rhines.jpg

    This is the third in the series of "20 Questions with Wally Rhines":

    In the early 1970s I was working on a PhD thesis based upon GaAs light emitting diodes, or LEDs. Many of my predecessors in the Materials Science and Engineering Department at Stanford had worked on other aspects of III-V compounds ...
    by Published on 06-21-2018 02:00 PM
    1. Categories:
    2. Semiconductor Design,
    3. Semiconductor IP,
    4. Mentor Graphics
    Article: Battling SoCs: QCOM vs NVDA vs Samsung-caption.jpg

    Functional and physical verification are easily the two long poles in most IC product developments. During a design implementation cycle, design teams tend to push physical verification (PV) step towards the end as it is a time consuming process and requires significant manual interventions.

    PV Challenges
    In the traditional physical design flow, ...
    by Published on 06-21-2018 10:00 AM
    1. Categories:
    2. Methodics,
    3. Events,
    4. Automotive
    Article: All Things Resistive-methodics-dac.jpg

    I've been visiting DAC for decades now, at first as an EDA vendor and since 2004 as a freelance EDA consultant. There's always a buzz about what's new, semiconductor industry trends, who is getting acquired and the latest commercial EDA and IP offerings. There's so much vying for my attention at DAC each year that it can seem like a blur, however ...
    by Published on 06-21-2018 05:00 AM
    1. Categories:
    2. Semiconductor Design,
    3. ANSYS, Inc.,
    4. Mobile,
    5. Automotive,
    6. FinFET
    Article: IP vendors enable SuperSpeed USB IP take off in 2012-alaska-fishing-min.jpg

    I’m not going to be at DAC this year because I scheduled a fishing trip at the end of June, assuming the show would stay true to form as an early/mid-June event. Still, having to endure salmon and halibut fishing in Alaska rather than slogging around Moscone ...
    by Published on 06-20-2018 02:00 PM
    1. Categories:
    2. Semiconductor Design,
    3. Events
    CES 2013 Trip Reports (Win an iPad Mini!)-hot-2018-banner-ad-400x400.jpg

    The Design Automation Conference (DAC), now in its 55th year, always offers a lively mix of activities. For EDA vendors and their customers, the focus is on the exhibit floor and in booth suites where the latest technology is on display. For R&D ...
    by Published on 06-20-2018 09:00 AM
    1. Categories:
    2. Semiconductor Services,
    3. Oski Technology
    Article: Is the RTL Design Flow Broken?-vigyan-min.jpg

    If you read around topics in advanced formal verification you’re likely to run into something called Wolper coloring, or what Vigyan Singhal (Chief Oski at Oski) calls the Wolper method. Many domains have specialized techniques but what’s surprising in this instance is a seeming absence ...

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