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    by Published on 04-24-2017 05:00 AM
    1. Categories:
    2. Semiconductor IP,
    3. Open-Silicon
    Article: Mentor and NXP Demonstrate that IJTAG Can Reduce Test Setup Time for Complex SoCs-crehan-july15-min-jpg

    If you are familiar with high bandwidth networking applications, you probably know this chip-to-chip (C2C) interface protocol. Interlaken architecture, fully flexible, configurable and scalable, is also an elegant answer to the need for very high bandwidth C2C communication. Interlaken is elegant because the protocol defines the controller specification and can interface with various SerDes architectures, up to 56 Gbps SerDes rates with Forward Error Correction (FEC).

    ...
    by Published on 04-23-2017 05:00 AM
    1. Categories:
    2. Semiconductor Design,
    3. Cliosoft,
    4. Events
    Article: Static Timing Analysis for Memory Characterization-cliosoft-i-love-dac-min-jpg

    I've been attending DAC since the late 1980's and can tell you that it's an annual highlight for me and anyone else interested in the EDA, IP and semiconductor industries. Where else can you see most of the big and little vendors of EDA software, semiconductor IP and foundries in one place? I recently blogged about the DAC keynote speakers, and then there's ...
    by Published on 04-21-2017 10:00 AM
    1. Categories:
    2. Semiconductor Design
    Article: Why are AMS designers turned off by Behavioral Modeling?-electronic-design-automation-ics-jpg

    It’s always a struggle explaining electronic design automation (EDA) to people who ask me what field I am in. I have come up with simple and minimal descriptions – such as “software used for designing semiconductors.” This, of course, ...
    by Published on 04-21-2017 05:00 AM
    1. Categories:
    2. Semiconductor Design,
    3. Solido DA
    Article: Jasper User Group Keynotes-semiwiki_mllabs_flowchart-jpg

    Semiconductor design is littered with complex, data-driven challenges where the cost of error is high. Solido’s new ML (machine learning) Labs, based on Solido’s ML technologies developed over the last 12 years, allows semiconductor companies to collaboratively work with Solido ...
    by Published on 04-20-2017 10:00 AM
    1. Categories:
    2. Semiconductor Design,
    3. Mentor Graphics
    The International Conference on Engineering of Reconfigurable Systems and Algorithms-collaborative_design-min-jpg

    The diamond jewelry industry encourages customers to focus on the 4C's -- cut, clarity, color, and carats. At the recent PCB Forum conducted by Mentor (a Siemens business) in Santa Clara, I learned that current system design flows also require an emphasis on the 4C's -- collaboration, concurrency, consistency, and a cloud environment. These capabilities need to span schematic design, constraint management, and physical PCB design and layout.

    The complexity of current products ...
    by Published on 04-20-2017 08:00 AM
    1. Categories:
    2. Semiconductor Design,
    3. Synopsys
    Article: Creating Plug-and-Play IP Networks in Large SoCs with IEEE P1687 (IJTAG)-checklist-min-jpeg

    Facing rapidly growing challenges in getting to respectable coverage, designers have been turning more and more to formal verification, not just to plug gaps but increasingly to take over verification of significant components of the testplan. Which is great, but at the end of the day any approach to verification must be measured against its contribution to coverage and most ...
    by Published on 04-20-2017 05:00 AM
    1. Categories:
    2. Semiconductor Design,
    3. Cadence
    Article: Why are AMS designers turned off by Behavioral Modeling?-virtual-reality-min-jpeg

    In the world of hardware emulators, virtualization is a hot and sometimes contentious topic. It’s hot because emulators are expensive, creating a lot of pressure to maximize return on that investment through multi-user sharing and 24x7 operation. ...
    by Published on 04-19-2017 10:00 AM
    1. Categories:
    2. Semiconductor Design,
    3. Mentor Graphics,
    4. Automotive
    Article: Adesto Acquisition of Atmel Serial Flash: Strange Bedfellows?-classical-data-processing-min-jpg

    I read at least one hour of news every day to keep informed, and I've read so many stories about autonomous vehicles that the same, familiar company names continue to dominate the thought leadership. What really caught my attention this month was an announcement about autonomous vehicle technology coming from Mentor Graphics, now a Siemens Business. I knew that Mentor has been serving the automotive market with ...
    by Published on 04-19-2017 05:00 AM
    1. Categories:
    2. Semiconductor Manufacturers,
    3. Events
    Article: Why are AMS designers turned off by Behavioral Modeling?-spie2017_nxe3400_mvdk_170228_v2_page_07-jpg

    At the SPIE Advanced Lithography conference I sat down with Mike Lercel, Director of Strategic Marketing for ASML for an update. ASML also presented several papers at the conference and I attended many of these. In this article, I will discuss my interview with Mike and summarize the ASML presentations.
    ...
    by Published on 04-18-2017 10:00 AM
    1. Categories:
    2. Semiconductor IP,
    3. Arteris,
    4. Automotive
    Article: Why are AMS designers turned off by Behavioral Modeling?-adas-blocks-min-jpg

    The news media has naturally focused on the handful of deaths that have occurred while auto-pilot features have been enabled. In reality, automobile deaths are occurring at a lower rate now than ever. In 2014 the rate was 1.08 deaths per 100 million miles driven. Compare ...

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