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    by Published on 05-26-2017 05:00 AM
    1. Categories:
    2. Semiconductor Design,
    3. Methodics,
    4. Events
    Article: Why are AMS designers turned off by Behavioral Modeling?-methodics-percipient-webinar-400x400-jpg

    The semiconductor IP market continues growing at a healthy rate, and IP reuse is a staple of all modern SoC designs. Along with the acceptance of IP reuse comes a host of growing challenges, like:

    • Increase in design files
    • Increase in meta-data
    • More links between design members worldwide
    • More links between data in multiple engineering
    by Published on 05-25-2017 10:00 AM
    1. Categories:
    2. IoT Internet of Things
    Article: Andy Bryant Will Now Lead Intel Into The Foundry Era-three-major-challenges-facing-iot-jpg

    The Internet of Things (IoT) — a universe of connected things providing key physical data and further processing of that data in the cloud to deliver business insights— presents a huge opportunity for many players in all businesses and industries . Many companies are organizing themselves to focus on IoT and the connectivity of their future products and services. For the IoT industry to thrive there are three categories of challenges to overcome and this is true for any new trend in technology not only IoT: technology, business and society [1, 2, 3].

    This part is covering all technologies needed to make IoT ...
    by Published on 05-25-2017 05:00 AM
    1. Categories:
    2. Semiconductor Design,
    3. Cadence,
    4. Automotive
    Article: How much SRAM proportion could be integrated in SoC at 20 nm and below?-1-visionp6-min-jpg

    If you read an article dealing with Convolutional Neural Network (CNN), you will probably hear about the battle between CPU and GPU, both off-the-shelf standard product. Addressing CNN processing needs with standard CPU or GPU is like having to sink a screw when you only have ...
    by Published on 05-24-2017 10:00 AM
    1. Categories:
    2. Semiconductor Design,
    3. Mentor Graphics
    Article: Here to make my stand, with a chipset in my hand-compression-versus-demand-min-jpg

    Semiconductor companies are looking for ways to keep their business profitable by managing expenses on both the design and test side of electronic products, which is quite the challenge as the trends show increases in test pattern count and therefore test costs. Scan compression is a well-known technique first created over 15 years ago that can be used to reduce the cost of testing ICs by compressing your test patterns so that you use less ...
    by Published on 05-24-2017 05:00 AM
    1. Categories:
    2. Semiconductor Design,
    3. Synopsys,
    4. Events
    Article: Andy Bryant Will Now Lead Intel Into The Foundry Era-power-meter-min-jpeg

    Power has become a very important metric in modern designs – for mobile and IoT devices which must live on a battery charge for days or years, for datacenters where power costs can be as significant ...
    by Published on 05-23-2017 10:00 AM
    1. Categories:
    2. Semiconductor Design,
    3. FPGA,
    4. Synopsys
    Article: Designing with FinFETs-cdc-challenges-fpga-design-min-jpg

    FPGAs have become a lot more capable and a lot more powerful, more closely resembling SoCs than the glue-logic we once considered them to be. Look at any big FPGA – a Xilinx Zynq, an Intel/Altera Arria or a Microsemi SmartFusion; these devices are full-blown SoCs, functionally different from an ...
    by Published on 05-23-2017 02:30 AM
    1. Categories:
    2. Semiconductor Manufacturers,
    3. GlobalFoundries,
    4. IoT Internet of Things,
    5. FD-SOI,
    6. Automotive
    Article: Mentor and NXP Demonstrate that IJTAG Can Reduce Test Setup Time for Complex SoCs-chengdu-globalfoundries-fab-jpg

    When GlobalFoundries first briefed me on 22FDX during a trip to Dresden in 2015, China was one of the first things that came to mind. The China semiconductor market was still on 28nm and FinFETs seemed far away for the majority of the Chinese fabless companies. A low cost, low power, low complexity 22nm process with a path to 12nm (12FDX) seemed like a perfect fit and as it turns out it is, absolutely.

    by Published on 05-22-2017 05:00 AM
    1. Categories:
    2. Semiconductor IP,
    3. FPGA,
    4. Flex Logix
    The International Conference on Engineering of Reconfigurable Systems and Algorithms-global-microcontroller-market-jpg

    It is nice to see an emerging market successfully emerge for a change. With embedded FPGAs we are way past test chips and are now seeing tape-outs and silicon in a variety of applications. I’m not sure what the current market estimate of eFPGA is just yet but they align nicely with the $30B+ micro ...
    by Published on 05-21-2017 05:00 AM
    1. Categories:
    2. IoT Internet of Things
    Article: Is The Fabless Semiconductor Ecosystem at Risk?-agriculture-vs-food-waste-jpg

    We, in the hi-tech community, tend to gravitate towards the technology, the API, the device, the platform, the processes node and to forget the goal behind all of those items. We have all noticed the platform wars and cloud API struggle for #IoT market domination. Someone needs to bring back the discussion to the top level, to why we started down the road of #IoT a few years ...
    by Published on 05-19-2017 10:00 AM
    1. Categories:
    2. Events,
    3. IoT Internet of Things,
    4. Dolphin Integration
    Article: Designing with FinFETs-1-dolphin-low-power-recipe-min-jpg

    Dolphin is addressing the ultra-low-power (ULP) needs for some applications, like for example Bluetooth low energy (BLE), machine-to-machine (M2M) or IoT edge devices in general. For these applications, defining active and sleep modes is imperative, but it may not be enough to guarantee that the battery-powered system will run for years, especially ...

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