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TechCon: See ANSYS and TSMC co-present

TechCon: See ANSYS and TSMC co-present
by Bernard Murphy on 10-12-2017 at 7:00 am

ANSYS and TSMC will be co-presenting at ARM TechCon on Multiphysics Reliability Signoff for Next Generation Automotive Electronics Systems. The event is on Thursday October 26th, 10:30am-11:20am in Grand Ballroom B.

20550-reliability-bathtub_curve.svg-min.jpg
You can get a free Expo pass which will give you access to this event HERE and see the session page for the event HERE.

This topic is becoming a pressing concern, especially for FinFET-based designs. There are multiple issues impacting aging, stress and other factors. Just one root-cause should by now be well-known – the self-heating problem in FinFET devices. In planar devices, heat generated inside a transistor can escape largely through the substrate. But in a FinFET, dielectric is wrapped around the fin structure and, since dielectrics generally are poor thermal conductors, heat can’t as easily escape leading to a local temperature increase, and will ultimately escape significantly through local interconnect leading to additional heating in that interconnect. Add to that increased Joule heating thanks to higher drive and thinner interconnect and you can see why reliability becomes important.

Arvind Vel, Director of product management at ANSYS and Tom Quan, Deputy Director, Design Infrastructure Marketing Division, TSMC North America will be presenting. This should be an interesting session. ANSYS have developed an amazingly comprehensive range of solutions for design for reliability, spanning thermal, EM, ESD, EMC, stress and aging concerns. In building solutions like this, they work very closely with TSMC, so much so that they got a partner of the year award this year at the TSMC OIP conference.

Summary
Design for reliability is a key consideration for the successful use of next generation system-on-chips (or SoCs) in ADAS, infotainment, and other key automotive electronics systems. These SoCs manufactured on TSMC’s 16FFC process are advanced multi-core designs with significantly higher levels of integration, functionality and operating speed. These SoCs have to meet the strict requirements for automotive electronics functional safety and reliability.

ANSYS and TSMC have collaborated to define workflows that enable electromigration, thermal and ESD verification and signoff across the design chain (IP to SoC to package to system). Comprehensive multiphysics simulation that captures the various failure mechanisms and provides signoff confidence is needed to not only guarantee first time product success but also ensure compliance within regulatory limits.

This session will provide an overview of ANSYS’ chip package system reliability signoff solutions to create robust and reliable electronics systems for next generation automotive applications along with case studies based on TSMC’s N16FFC technology.

Founded in 1970, ANSYS employs nearly 3,000 professionals, many of whom are expert M.S. and Ph.D.-level engineers in finite element analysis, computational fluid dynamics, electronics, semiconductors, embedded software and design optimization. Our exceptional staff is passionate about pushing the limits of world-class simulation technology so our customers can turn their design concepts into successful, innovative products faster and at lower cost. As a measure of our success in attaining these goals, ANSYS has been recognized as one of the world’s most innovative companies by prestigious publications such as Bloomberg Businessweek and FORTUNE magazines.

For more information, view the ANSYS corporate brochure.

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