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  • ClioSoft & DAC : Booth 613 – Collaborative Design, Design Data & IP Management and Design Reuse

    Article: Is The Fabless Semiconductor Ecosystem at Risk?-cliosoft-logo-jpg
    It’s time again to gather for the next Design Automation Conference (DAC). This will be the 54th such meeting and this year it runs from June 19th – 21st in the Live Music Capital of the World, Austin Texas. Put on your best duds, boots and cowboy hat and make your way to Texas.
    Article: Is The Fabless Semiconductor Ecosystem at Risk?-cliosoft-sos7-jpg
    While you are there make sure to stop by the ClioSoft booth, #613, and learn about ground breaking advancements in System on-Chip (SoC) design and intellectual property (IP) management. ClioSoft will be giving demos and leading discussions on the challenges of SoC design and how their design data management software, SOS, is helping companies like Analog Devices, Google and TSMC to manage their projects.

    State-of-the art SoCs can now be made of multiple billions of transistors with a multitude of different IPs (both 3rd party and internally developed) being used from all over the world. Design teams continue to get bigger and include engineers from multiple disciplines including hardware, software, design verification, packaging, manufacturing testing and yield to name a few. All these disciplines have their part to play and companies are being challenged to bring these disparate groups together to form virtual teams to make successful products. ClioSoft’s products are used to enable this collaboration even when teams are dispersed across thousands of miles and multiple different time zones.
    Article: Is The Fabless Semiconductor Ecosystem at Risk?-visdiff-jpg
    In addition to demonstrating their SOS and Visual Design Diff (a slick capability that enables chip designers to visualize and track changes between different versions of schematics and layouts) products, ClioSoft will also be showcasing their new designHUB software. The designHUB platform is a unique technology, which helps companies take design reuse to a whole new dimension. It provides an IP reuse ecosystem, which encompasses a knowledge base for both internal and 3rd party IPs to help designers leverage the past experiences of designers.

    In addition, by providing a dashboard for designers and projects alike, it brings another dimension to collaboration within a company. The designHUB platform enables the creation and sharing of IP meta-data that can be used by teams to search, view, qualify and select IP for their designs. it also tracks IP usage including 3rd party IPs and mitigates unauthorized usage of the IPs within a company. When visiting be sure to have ClioSoft explain their use of crowdsourcing within designHUB to enable knowledge transfer between IP developers and design teams that use the IP.

    While you are at DAC you may also want to check out the DAC panel discussion titled, ‘Have Third Party IPs Killed Internal IP Development?’. This panel will discuss the pros and cons of using third party IPs and their impact on internal IP development. Ranjit Adhikary, ClioSoft VP marketing, will be on this panel along with Rich Wawrzyniak of Semico Research Corp, Philippe Quinio of ST Microelectronics, Daniel Cooley of Silicon Labs and Andy Hawkins of Cypress Semiconductor. The panel will be held Wednesday June 21 from 3:30-5:00p in Ballroom G.

    And what would DAC be without a little fun and relaxation? The ClioSoft team will be hosting a DAC party Tuesday evening, June 20th starting at 7:00p. The party will be held at Micheladas in downtown Austin. This is one of Austin’s many venues made famous by the South-by-Southwest events that happen each year. There’s no admission fee and ClioSoft will be sponsoring complimentary beers, margaritas, wine and hors d’oeuvres. It’s a great opportunity to relax after a long day at the DAC show and network with friends and colleagues. Inquire now with ClioSoft as the party is by invitation only and will have limited invitations.

    Article: Is The Fabless Semiconductor Ecosystem at Risk?-cliosoft-dac-floor-jpg

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