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Analog Bits and TSMC!

Analog Bits and TSMC!
by Daniel Nenni on 01-10-2017 at 12:00 pm

TSMC WaferAs a long time semiconductor IP professional I can tell you for a fact that it is one of the most challenging segments of semiconductor design. Given the growing criticality of semiconductor IP, the challenges of being a leading edge IP provider are increasing and may be at a breaking point. The question now is: What does it take to be a successful leading edge semiconductor IP company?

First and foremost, you must have a high tolerance for pain! Not only do you compete with other IP companies, big and small, you compete with internally developed IP which is like selling shoes to a shoemaker.

Second, you have to have a VERY close “silicon proven” relationship with the foundries. All was well in the Semiconductor IP business until FinFETs came about. Not only are FinFETs a significant design challenge requiring early access to leading edge processes, the foundries have locked down that early access. Do you remember back at 28nm and above when the foundry processes were all “T like”? IP companies developed products at TSMC and ported them to UMC, SMIC, and Chartered making it much easier to scale your IP development, right? That portability is now gone with FinFETs and as we move down the process path to 7nm and 5nm the design challenges and security restrictions are growing rapidly, absolutely.

Third, your business model had better be mean and lean with the ability to pivot at a moment’s notice. The good news is that silicon proven commercial IP is much more attractive now that design cycles are tight, the tightest I have ever seen actually. I am also seeing more systems companies making their own chips using commercial IP. Then there is the semiconductor company consolidation which is a double edged sword. It is good news if your customer takes over your competitor’s customer and not so good news if it is the other way around. So you had better be nimble, you had better be quick, and that brings us to the poster child for a successful leading edge IP company: Analog Bits.

Founded in 1995 here in Silicon Valley, Analog Bits has zero external funding and has enabled billions of chips from .25 micron down to FinFETs via more than 350 customers worldwide and more than 70 unique processes. They are experts (1st time right) at low power mixed signal IP and a pioneer in Multi-Protocal SERDES. Analog Bits is also an ardent TSMC supporter (which is where I know them from) and a member of the exclusive “TSMC Partner of the Year” club.

In fact, Analog Bits presented twice at the previous TSMC OIP Ecosystem Forum. The first presentation was Silicon-proven, low power IP for TSMC 16nm FFC for Automotive to Datacenter SOC’s and the second was Design and Verification of 16nm FFC Low Power SERDES for Datacenter and Automotive Applications. The theme of course is leading edge SoC design for two of the hottest semiconductor vertical markets. If you click on the links it will take you to the abstracts on the TSMC site. To see the full presentation you will need to have a TSMC account or you can contact Analog Bits and talk to them directly.

You can hear a bit more about Analog Bits in the recruitment video below. They are hiring big time:

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