It's Better than SUPREM for 3D TCAD

Process and device engineers have a tough task to model and simulate an IC process prior to fabricating silicon, however this approach is much better than the alternative choice in the 1970's of just running multiple lots of wafers and then making measurements to see if your node was meeting specifications. Out of Stanford University came a process simulator tool named SUPREM some 30 years ago, and the industry adopted it along with researchers. Nothing lasts forever, and so is the case for SUPREM because alternative tools for process simulation are available.

An ideal process simulator should have many capabilities, like:

• 1D/2D/3D process simulation
• Adding new materials
• Create new processes
• Low learning curve
• A path from SUPREM decks
• Flexible methods for simulation meshes
• Supporting layout-driven process simulation

When I think of TCAD tools the company name of Silvaco comes to mind, and they are presenting a webinar on December 8th at 10AM PDT. More info here.


Simulation of a SRAM cell

Silvaco has both a 1D/2D/3D process simulator (Victory Process) and a 2D process simulator (Athena), and the focus of this webinar is on Victory Process. Here's what you will learn at the webinar:

• Key differences between Athena and Victory Process
• How to translate legacy SUPREM-based decks to VP2D using DeckBuild utility A2VP
• How to set, control and refine/unrefine simulation mesh
• How to use layout driven process simulation
• How to use basic geometrical and physical etching and deposition models
• How to export 2D structures for visualization and device simulation

​The presenter for this webinar is Dr. Misha Temkin, and he's a Senior AE at Silvaco in the TCAD group. Misha started out some 40 years ago in the USSR and has authored papers and books on TCAD topics. Dr. Temkin has been with Silvaco since 1989 and is an expert in using both Athena and Victory Process tools.