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  • Making your AMS Simulators Faster (webinar)

    I've been following Cadence Design Systems ever since it was formed in 1988 by the merger of SDA Systems and ECAD, Inc. At that time I was working at Silicon Compiler Systems, soon to be acquired by Mentor Graphics. ClioSoft is another company that I've known about for several years now, mostly for their design management tools that work inside of popular EDA environments like the Cadence Virtuoso system used by AMS designers.

    Related blog - 3 small-tem design productivity challenges managed

    Some of the challenges with AMS designs for IC teams today is that design engineers can be spread across multiple sites, even in different time zones or in different countries. With a time to market deadline looming, it can be difficult to properly communicate with all of the designers about which version of every IP block to be using on their project, when there can be hundreds of different blocks. Fortunately for us these two EDA vendors - Cadence and ClioSoft, have been working together on integrating design management into the Virtuoso environment.

    Related blog - Organizing data is first step in managing AMS designs

    There's a webinar on Wednesday, October 26th at 10:30AM PST that you will want to attend if you use any of the Cadence tools, like:

    • Virtuoso ADE Explorer
    • Virtuoso ADE Assembler
    • Virtuoso Variation Option
    • Virtuoso ADE Verifier
    • Maestro View

    DVFS NOC-sos_flow-wide-min.jpg

    Related blog - 10 challenges in IP design collaboration

    Steve Lewis from Cadence will be talking about their analog design suite and how Virtuoso IC6.1.7 works in an IC design flow. Next up in the webinar is Karim Khalfan from ClioSoft to demonstrate how their SOS7 design management tools work inside of the Cadence Virtuoso environment. You'll also get to see how Maestro View works and how the IC6.1.7 release has gotten quicker to use.

    Register for the Webinar today.

    The SOS software from ClioSoft is used for both design and semiconductor IP management by hardware designers on an IC team. It's kind of unique because it spans digital, analog, RF and mixed-signal designs. Your design teams can be in a single or even multiple design centers, then collaborate using automation on their projects.

    About ClioSoft
    ClioSoft was launched in 1997 as a self-funded company, with the SOS design collaboration platform as its first product. The objective was to help manage front end flows for SoC designs. The SOS platform was later extended to incorporate analog and mixed-signal design flows wherever Cadence Virtuoso® was predominantly used. SOS is currently integrated with tools from Cadence®, Synopsys®, Mentor Graphics® and Keysight Technologies®. ClioSoft also provides an enterprise IP management platform for design companies to easily create, publish and reuse their design IPs.