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  • TSMC 16nm, 10nm, 7nm, and 5nm Update!

    Word on the street is that TSMC is on schedule with 16FFC, 10nm and 7nm, which is a very big deal for the fabless semiconductor ecosystem. As Scotten Jones has illustrated in the graphic below, for the first time in the history of the semiconductor industry a pure-play foundry (TSMC) will have the process lead over Intel. And this is not just about TSMC, this is about the fabless semiconductor ecosystem delivering 10nm chips in the first quarter of 2017 and 7nm in the first quarter of 2018, absolutely.

    Article: A Brief History of ASIC, part I-standardized-proces-node-date-comparison-min.jpg


    Also read: The 2016 Leading Edge Semiconductor Landscape


    To be clear, our smartphones will be powered by the fastest silicon the semiconductor industry has to offer and that my friends is simply incredible! Super computing power at the tips of our fingers, literally.

    A complete 16FFC, 10nm, and 7nm process update will be made available via the TSMC OIP Ecosystem Forum at the San Jose Convention Center on September 22nd from 8am to 6:30pm and I can tell you from my conversations inside the fabless semiconductor ecosystem it will definitely be worth your time.

    SemiWiki bloggers: Tom Simon, Tom Dillinger, Bernard Murphy, and myself will be there as well as more than 1,000 semiconductor professionals from around the world. If you are attending let us know as it would be a pleasure to meet you.

    Just in case you missed it here is the TSMC OIP overview and agenda:

    The TSMC OIP Ecosystem Forum brings together TSMC's design ecosystem companies and our customers to share practical, tested solutions to today's design challenges. Success stories that illustrate TSMC's design ecosystem best practices highlight the event.

    More than 90% of last year's attendees said that, "the forum helped me better understand TSMC's Open Innovation Platform" and that "I found it effective to hear directly from TSMC OIP member companies."

    This year's event will prove equally valuable as you hear directly from TSMC OIP companies about how to apply their technologies to address your design challenges!

    Article: A Brief History of ASIC, part I-tsmc-oip-2016-min.jpg

    This year, the forum is a day-long conference kicking-off with trend-setting addresses and announcements from TSMC and leading IC design company executives.

    The technical sessions are dedicated to 30 selected technical papers from TSMC's EDA, IP, Design Center Alliance and Value Chain Aggregator member companies. And the Ecosystem Pavilion feature up to 60 member companies showcasing their products and services.

    Learn About:

    Attendees will discover:

    • Emerging advanced node design challenges including 7nm, 10nm, 16FFC, 16nm FinFET+, 28nm, and ultra-low power process technologies
    • Updated design solutions for specialty technologies supporting Internet-of-Thing (IoT) applications
    • Successful, real-life applications of design technologies and IP from ecosystem members and TSMC customers
    • Ecosystem-specific TSMC reference flow implementations
    • New innovations for next generation product designs

    Hear directly from ecosystem companies about their TSMC-specific design solutions.

    Network with your peers and more than 1,000 industry experts and end users.

    The TSMC Open Innovation Platform Ecosystem Forum is an "invitation-only" event. Please register to attend. The views expressed in the presentations made at this event are those of the speaker and are not necessarily those of TSMC.