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  • The Role of IP Selection and Integration in First-Time Silicon Success

    Article: EDA Industry Talks about Smart Phones and Tablets, Yet Their Own Web Sites are Not Mobile-friendly-semiconductor-ip-webinar-open-silicon-jpgAs IP expert Eric Esteve has written, Semiconductor IP has consistently outgrown the other design enablement segments and will continue to do so. This has been my personal experience as well during my EDA and IP career so we should all know how important Semiconductor IP is. We certainly know how valuable it is with ARM valued at $32B!

    Also read: Design IP Growth Is Fueling 94% of EDA Expansion

    Since the beginning of SemiWiki, Semiconductor IP has driven the most traffic. As of today there have been 640 IP blogs published on SemiWiki that have been viewed a total of 2,739,472 times, absolutely! Some of the top IP search terms we have seen are: IP Verification, IP Integration, IP Validation, Low Power IP and of course IP Selection, which brings us to the latest Open Silicon Webinar:

    The Role of IP Selection and Integration in the Achievement of First-Time Silicon Success


    This Open-Silicon webinar will address key considerations when selecting and integrating IP into ASIC/SoC designs. No longer can the procurement and integration of third-party IP be done in isolation as just an IP block. System issues associated with choosing the right hardware, appropriate firmware and optimum embedded software in which the ASIC/SoC will fit, is now the biggest driver for third-party IP procurement. As a result, navigating the many challenges associated with blending diverse IP from multiple vendors, increasing software complexity, design challenges in process manufacturing, hardware implementation and emulation, trade-offs in system architecture, and maintaining compliance with ever-evolving standards, is the key to successful integration and first-pass silicon.

    Those joining the webinar will learn what third-party IP vendors and turnkey ASIC solutions providers are doing from a system perspective down to the transistor level, to not only mitigate these challenges and facilitate seamless integration, but reduce cost and incorporate greater flexibility and functionality while maintaining the system perspective using pre-verified and customized IP blocks. The panelists will delve deep into the architectural deliverables, trade-offs on IP selection, and quality benchmarks that enable the best performance of an ASIC/SoC for any specified application or operating condition. This includes compatibility assurances across all of the IPs front/back-end views and deliverables within any specific tool flow, as well as the foundry processes. Other topics to be discussed include system level checklists, integration checklists, integration reviews, tape-out reviews, certifications, evaluation boards and more.

    Article: EDA Industry Talks about Smart Phones and Tablets, Yet Their Own Web Sites are Not Mobile-friendly-open-silicon-ip-webinar-banner-min-jpg


    Speaker Biographies:

    Elias Lozano
    Senior Director, IP Sourcing, Open-Silicon
    Elias serves as Senior Director of IP Sourcing for Open-Silicon. He helps procure and qualify a wide variety of analog, mixed-signal and digital IP. Elias has over 25 years of specialized experience in the analog, mixed-signal and digital design markets. He is well versed in project implementation working in the forefront of VLSI/mixed-signal/analog technology, design and back/front-end ASIC methodologies. Elias has demonstrated proven success in implementing complex custom SoCs with first time working silicon. Prior to joining Open-Silicon, Elias held various IP engineering and management roles at RAMBUS, National Semiconductor and LSI Logic. Elias holds a masterís degree in electrical engineering from Washington State University.

    Vamshi Krishna
    IP Solutions Manager, Open-Silicon
    Vamshi serves as IP Solutions Manager for Open-Silicon. He is responsible for managing third-party IP function, which involves selection, procurement, quality check and integration of various enterprise and consumer application IPs. Prior to joining Open-Silicon, Vamshi was Hard IP Applications Engineer at Intel. Prior to that, he served as Product Applications Engineer at MosChip Semiconductor, where he was responsible for IP/product quality checks, delivery and support. Vamshi holds a bachelorís degree in electronics and communications engineering from Kakatiya University, India.

    About Open-Silicon
    Open-Silicon transforms ideas into system-optimized ASIC solutions within the time-to-market parameters desired by customers. The company enhances the value of customersí products by innovating at every stage of design ó architecture, logic, physical, system, software and IP ó and then continues to partner to deliver fully tested silicon and platforms. Open-Silicon applies an open business model that enables the company to uniquely choose best-in-industry IP, design methodologies, tools, software, packaging, manufacturing and test capabilities. The company has partnered with over 150 companies ranging from large semiconductor and systems manufacturers to high-profile start-ups, and has successfully completed 300+ designs and shipped over 120 million ASICs to date. Privately-held, Open-Silicon employs over 250 people in Silicon Valley and around the world. www.open-silicon.com