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  • Free PDF Version of PROTOTYPICAL Now Available!

    Article: Analog FastSPICE added to Tanner EDA-s2c-protoyping-board-min-jpgIn case you have not noticed the advertisement to the bottom left of your screen, a free PDF version of our book “PROTOTYPICAL” is now available on the S2C website if you did not get your autographed version at #52DAC or printed version from Amazon. Or maybe you are just an eBook type of person. Just to recap:

    The first half of “PROTOTYPICAL” is a concise history of FPGA-based prototyping. We go back to the beginning, briefly introducing the debut of the Altera EP300 in 1984 and the Xilinx XC2064 in 1985. We then discuss the tipping point for what would become FPGA-based prototyping: the introduction of the Quickturn Systems RPM in May 1988. Strictly speaking, the RPM was an FPGA-based hardware emulator, but it set the stage for a radical change in chip development methodology. Intel took the Quickturn technology and put the P5 microarchitecture through its paces on a 14-machine cluster, running a killer demo in 1991 and ultimately releasing the Pentium microprocessor in 1993.

    From there, while the large EDA firms scuffled over bigger and bigger hardware emulation capability, several academic teams started deploying FPGAs for reconfigurable computing and rapid prototyping. These teams were looking for lower cost ways to prove out algorithms and chip designs. It was during this period issues of FPGA interconnect and synthesis partitioning were uncovered and addressed – and just in time, as ARM7TDMI synthesizable cores appeared in 1997.

    We then launch into chapters with brief timelines of three of the major firms in FPGA-based prototyping: S2C, Synopsys, and Cadence. We close the first half with a look at where FPGA-based prototyping is headed, including how it can help application segments such as automotive, wearables, and the IoT – three segments we believe will see an increasing number of design starts as new players seek to optimize and differentiate their software through chip design.

    The second half of “PROTOTYPICAL” is an all-new Field Guide titled “Implementing an FPGA Prototyping Methodology” authored by the teams at S2C. It looks at when design teams need an FPGA-based prototyping solution, how to choose one, and how to be sure the platform is scalable including a look at the latest cloud-based implementations. It then dives into the methodology: setting up a prototype, partitioning, interconnect, debugging, and exercising a design. It’s a practical view of the questions teams have and the issues they run into, and how to solve them.

    Contents
    Foreword
    The Future of FPGA Prototyping
    Design for FPGA Prototyping
    Moving to the Cloud
    Introduction: The Art of the “Start”
    A Few Thousand Transistors
    Microprocessors, ASICs, and FPGAs
    Pre-Silicon Becomes a Thing
    Enabling Exploration and Integration
    Chapter 1: SoC Prototyping Becomes Imperative
    Programmable Logic in Labs
    First Productization of Prototyping
    Fabless and Design Enablement
    Chapter 2: How S2C Stacked Up Success
    Making ESL Mean Something
    TAI IP and “Prototype Ready”
    Taking on the Cloud
    Chapter 3: Big EDA Moves In
    A Laurel and HARDI Handshake
    Verification is Very Valuable
    An Either-Or Response
    A Bright Future Ahead
    Chapter 4: Strategies for Today and Tomorrow
    The State of FPGA-Based Prototyping
    Developing for ARM Architecture
    Adoption Among Major System Houses
    Application Segments in Need

    FIELD GUIDE
    When Do You Need an FPGA-based Prototyping Solution?
    How Do I Choose Which Solution to Implement?
    Building a Scalable Prototyping Platform
    Overview of the FPGA Prototyping Methodology Flow
    Details of Implementing the FPGA Prototyping Flow
    Exercising the Design
    Coding with FPGA-based Prototyping in Mind


    Article: Analog FastSPICE added to Tanner EDA-prototypical-leaderboard-pdf-jpg