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  • 12 Reasons to Attend this Annual User Group Meeting for Transistor-level IC Designers

    My first job out of college was transistor-level circuit design of DRAMs at Intel, so I've continued to be fascinated with both the craft and science of designing, optimizing, verifying and debugging custom ICs. Last October I traveled to Munich, Germany to attend a two day user group meeting for engineers using tools from EDA vendor MunEDA. This year the MunEDA User Group Meeting is again a two day event held on October 27th and 28th in Munich Germany.

    Article: Industry Standard FinFET versus Intel Tri-Gate!-munich-germany-jpg
    Munich, Germany

    12 Reasons
    You probably need some reasons to convince your manager that this two day user group meeting will be worth your time, so here are 12 good reasons on why you should attend and learn more about relevant topics like:

    1. Custom circuit design migration and IP porting
    2. Low-power optimization of custom IC designs
    3. Advanced node designs (FinFET, FD-SOI)
    4. Ultra high sigma and yield analysis and optimization
    5. Memory design (SRAM, DRAM, Flash, FPGA, FTP, PCM)
    6. Standard cell and I/O library design
    7. Circuit and process modeling and model characterization
    8. Reliability, aging and degradation based design
    9. Circuit robustness verification and sign-off
    10. Multiple topologies exploration
    11. Smart power applications in general
    12. High power designs (BCD technologies)

    These are the typical topics with presentations from actual tool users, and yes there'll be a few presentations from MunEDA and I found them to be quite technical and detailed. Last year I watched presentations from companies like: SMIC, Lantiq, Novatek, STMicroelectronics, Infineon, Sapienza University in Rome, Altera, HLMC, Fraunhofer, University of Frankfurt and ARP Microsystems. Attendees receive a binder with all of the presentations, so if you like to take notes on the paper slides then it's ideal. There was quite the range of process nodes talked about in the presentations from mature 180 nm AMS nodes to bleeding-edge FinFET nodes and everything in between.

    In addition to the technical aspects of a user group meeting, there was plenty of time to network and socialize. My favorite social event was the dinner on the first night at a historic beer hall where we had a private room, great food, beer for the drinkers (water for me), and time to get better acquainted with key people from MunEDA. This user group meeting is kind of unique because of how close you get to know other attendees.

    EDA Tools
    The product family from MunEDA is called WiCkeD and it's a collection of EDA tools that allow a circuit designer to do five major tasks more easily and efficiently for custom IC designs:

    • Design Migration
    • Modelling
    • Verification and Optimization
    • Design Centering
    • Statistical Design Analysis

    Article: Industry Standard FinFET versus Intel Tri-Gate!-monte-carlo-analysis-jpg
    Monte Carlo Analysis

    Summary

    User group meetings like this one are a great place to meet other circuit designers, learn something new, and even talk directly with the development team to learn how to get the best results of your MunEDA tools. Get more information and register here.

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