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  • Thomas Skotnicki: FD-SOI 26 Years in the Making

    Article: 28nm Layout Needs Signoff Quality at Design Time-tomeczek-malutki.jpgIt seems to be FD-SOI week yet again. I talked to Thomas Skotnicki this morning. He is the father of thin-box FD-SOI and its birth is an interesting story. The story began 26 years ago (so not quite as far back as the photo!).

    Thomas is of Polish origins (he is actually Tomeczek) and grew up in Warsaw where he earned his PhD. In 1983 in Canterbury, England (famous for tales and archbishops), he presented a paper at the prestigious ESSDERC conference on his PhD work. France Telecom had a research lab in Grenoble (the French equivalent of the Bell Labs of the era) and they offered him a job. But this was before Europe was unified and Poland was still in the Soviet bloc so emigrating/immigrating took a while.

    Thomas worked for France Telecom for 14 years. Eventually, in 1999, they decided this research was better suited to a semiconductor firm, so they offered to transfer Thomas and his team to STMicroelectronics. At the time, although he had a team of 14 engineers, he was the only one who accepted the transfer. So he had to recreate his team and hire PhDs to continue the work. Thomas was the front-end team leader. He went on to be named the first Fellow at ST in 2006 and recently was promoted to Technical Vice-president and Company Fellow.

    But the story goes back all the way to France Telecom in 1988 when Thomas first published his new approach (voltage-doping transformation) to the physics of short-channel transistors. Back then the conventional wisdom was that the "box" (actually the buried oxide under the channel) should be thick. A thick box, however, precluded body bias. In thin box FD-SOI on the other hand, because the amplitude of body bias is not limited by diode leakage, the body bias is a very important feature of the technology. It enables the large performance boost or leakage reduction. In addition, Thomas’ equations suggested the thin box was optimal for suppressing short-channel effects.

    Article: 28nm Layout Needs Signoff Quality at Design Time-fdsoi.jpgMoreover, thin box simply did not exist, as no one had previously thought to ask for it. Now that Thomas was asking, the thin box turned out to be an extremely difficult technical challenge. As a result, the whole thin box idea went into standby mode for a decade. Then, in the late 1990s Thomas and his team, including Dr. Malgorzata Jurczak in a post-doc position in the team, developed a way to create a thin box on bulk CMOS. They called it "silicon on nothing" and it was the subject of 135 papers from Thomas and his internal and external colleagues and partners. This paper trail helped the ideas get some traction. Suddenly, people who had been arguing with him at conferences and on panel sessions were publishing their own papers, promoting thin box.

    In one particular instance, Thomas had a long fight over a key paper at IEEE Transactions on Electron Devices, where the editors didn't want to publish. Then a serendipitous change of editor opened the door to publication; the paper was given the Rappaport Award, as "best publication of the year" by the IEEE Electron Devices Society. As Mahatma Gandhi said: First they ignore you, then they laugh at you, then they fight you, then you win.

    With these successes building momentum, the semiconductor community finally started to believe in the idea. One important believer was Carlos Mazure from SOITEC where they make wafer blanks. SOITEC was excited by the potential of these thin-box, short-channel devices, but at the time they could only make a box 145nm thick, not the 10-20nm that was required. Under Carlos’ leadership, SOITEC was instrumental in launching the R&D program that successfully delivered thin box SOI wafers.

    At this point LETI got involved. Although most of their work was on thick-box devices, they decided to collaborate with Thomas to actually fabricate his ideas into real silicon. LETI helped with both silicon-on-nothing and then with thin-box FD-SOI. Up until then it had all been equations. The whole idea gained speed once the project was transferred from the whiteboard to silicon.

    Article: 28nm Layout Needs Signoff Quality at Design Time-prof.-t.-skotnicki.jpgThen, in 2011, Intel announced FinFET. Everyone already knew about FinFET and it was known to be really difficult technology. The complexity of FinFETs and the concerns about efficiently producing it led to raucous debate within the industry and within companies. Thomas sold the deal at ST when he showed that by turning a FinFET on its side you pretty much had silicon-on-nothing, FD-SOI with a thin box. It was the biggest day of Thomas' professional life when ST’s top management, including CEO Carlo Bozotti, COO Jean-Marc Chery, and EVP of Front-End Manufacturing Joël Hartmann made the decision to take its Ultra-Thin Body and Box FD-SOI to manufacture. Thomas recounted that from initial conception and equations to industrial fabrication it took 26 years.

    Industrialization of the manufacturing process went fast since the technology worked even better than the equations and FD-SOI is a much simpler technology than FinFET—it leverages the learnings of planar (bulk) silicon with fewer masks and processing steps, albeit with a slightly more expensive wafer.

    Still, selling FD-SOI beyond ST took a bit more time, as initially ST was alone and customers require partners, second sources, alliances and not just a single manufacturer. Today, however, the technology is being deployed worldwide not just at ST but also at Samsung and GlobalFoundries.

    As a marketing guy, I can't but help noticing a missed opportunity. "Silicon on nothing" is a much better name than FD-SOI.