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  • Antifuse is the New Foundation of NVM Below 16nm

    Article: ARM Seahawk-foundation.jpgToday the non-volatile memory (NVM) foundation is the eFuse. It is typically available for free from the foundry and is the default choice because, like Mount Everest, it is there. However, like Mount Everest it is big. It is also power hungry and slow. eFuse solutions blow the silicide on the poly line creating a change in resistance. There are other technologies, such as embedded flash, but these require additional process steps and cost. Others, like ROM, are only really suitable when every die contains the same code (such as fonts in a printer).

    Modern eFuse is built on polysilicon with Cobalt or Nickel silicide on top. The fuse is programmed by a well-known reliability mechanism called electromigration in which electron momentum pushes the silicide atoms out of the conductor link. Still, most fuses can only be programmed at wafer and have stringent power requirements for programming. It makes programming in packaged parts difficult. The bitcell is the largest of the standard CMOS NVM technologies. For higher bit density memory applications, e.g. greater than 4Kb, the size of the fuse quickly begins to take up the area of the SOC. eFuse is usually custom-designed and provided by the foundry as macros. As a result, it cannot be legally ported to another foundry without the consent of the foundry.
    Article: ARM Seahawk-kp2.jpg

    At 16nm and below the eFuse will get obsoleted and the replacement technology will be antifuse. It is 1/300th of the size of the eFuse, lower power and higher speed.

    An antifuse is the opposite of an eFuse. The circuit is open (high resistance) to begin with and is programmed closed by applying electrical stress that creates a low resistance conductive path. Antifuse NVM has been implemented for many decades using additional processing steps. Kilopass was the first to pioneer antifuse in a standard CMOS process with no additional processing steps. Kilopass holds patents for several flavors of bitcells, including the 1T and 2T.

    A hard gate oxide breakdown is used as the one-time programmable non-volatile memory mechanism. The breakdown is achieved by applying a high voltage on the program gate. Before the breakdown, between the gate and the source of the program transistor, it is isolated like a capacitor. After the breakdown, it behaves like a resistor between the gate and the source. The program transistor is isolated from the select transistor. Both the program and read transistors are implemented using core devices so as the technology scales, the bitcell scales.
    Article: ARM Seahawk-kpa.jpg

    Another issue with eFuse in these security-conscious days is that the security is very low. It is easy to identify blown fuses in a device through a microscope whereas antifuse is almost impossible to detect even for military grade security. It has proved to be impossible to read through either passive attacks such as power analysis, semi-invasive attacks such as microscopy, or invasive attacks such as microprobing, and even backside approaches.

    Article: ARM Seahawk-kilopasslogo.jpgThe table below summarizes the most important differences between eFuse and antifuse. Both can be manufactured in the standard CMOS process without any additional mask steps and then can be programmed after manufacturing making them one-time programmable (OTP), although the eFuse is normally programmed before packaging and antifuse can be programmed either before or after packaging since it does not require special voltages to be applied.

    Cell structurepoly fuse1T/2T antifuse
    Standard CMOSyesyes
    Bitcell area (normalized)3001
    128Kb area (normalized)81
    Program after packagingnoyes
    Standby and active currentHighLow
    Random access timeSlowFast
    High/low temperature & voltage toleranceMediumHigh