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  • Then, Python walked in for verification

    Go ahead – type “open source” into the SemiWiki search box. Lots of recent articles on the IoT, not so many on EDA tools. Change takes a while. It has only been about five years since the Big Three plus Aldec sat down at the same table to work on UVM. Since then, Aldec has also gotten behind OS-VVM, and is now linked to a relatively new open source verification project: Cocotb.

    While technologists debate the suitability of C/C++ and Java in application development, universities are churning out new programmers at an increasing rate, spurred on by the learn-to-code movement and MOOCs and a perceived need to create billions of things. According to a recent study, what language are most schools now teaching for introductory programming?

    Article: Apple blows away their numbers-silly-crosswalk-norway.jpgPython. (Yes, it is named in honor of those funny guys.) Like any other language, it isn’t made for everything, and as purists will point out its interpretive nature means code isn’t lightning fast. In an age of faster microprocessors and SoCs, that is becoming less of a factor in getting results. For web-based application programming, or host-based code like we’d find in a typical EDA verification platform, it’s solid.

    This is not just admiring a silly walk; it’s about solving problems with software. Given its straightforward syntax and lack of compilation, programmers are more productive in Python, meaning they produce more quality lines of code more quickly. When software programmers are in high demand and short supply, applications will tend to be written in what they are most comfortable with. For the next generation, Python will hit the mainstream.

    If the idea of Python in verification sounds vaguely familiar, it has been tried several times before – Tom Sheffler walks through the highlights of a decade of prior attempts at using Verilog and Python together. ScriptEDA, Scriptsim, APVM and Oroboro, and PyHVL were all research attempts to make Verilog callbacks and scheduling less messy. Chris Higgs describes how things are still messy:

    Article: Apple blows away their numbers-if-verification-equals-software.jpg

    Cocotb, which stands for Coroutine Cosimulation Testbench, has entered the stage. With a modern Python implementation, learning from the prior attempts and much more knowledge about the gap between Verilog and SystemVerilog and UVM, Cocotb is an all-new look at the verification problem. (Did I mention it's open source, on GitHub?)

    Wait, we just had a new look in UVM, right? How many UVM programmers do you know? A few hundred, maybe, a couple thousand spread across the industry? On the premise that “everybody knows Python” (not true for earlier attempts), Higgs has redesigned the testbench for verification by introducing Python as the abstraction for interaction with a simulator. It could be a short walk from millions of programmers to faster code to more chip designs that work.

    Article: Apple blows away their numbers-cocotb-architecture.jpg

    Higgs details a real-world example of an IP block for layer 2 / layer 3 packet parsing, about 500 lines of RTL that took about a week to design and synthesize. To verify it, he spent 1 month and 5000 lines in UVM. The same verification effort in Cocotb took less than 500 lines of code and 1 day of effort – and claims to have found bugs missed by UVM. That is an indicator of both improved productivity and the risks of super specialized knowledge required to drive other HDLs effectively.

    How does Aldec enter this picture? One of the simulators Cocotb supports is Riviera-PRO. A personal opinion: as a smaller player, Aldec has been more open to open source initiatives as a way to drive new innovation and create value faster. Also, Cocotb claims to be well suited for FPGA designs, a key area for Aldec which should draw even more interest.

    I’ve spared a lot of the technical details to avoid stealing the punchline. For your consideration, a recent webinar Aldec hosted with Chris Higgs describing Cocotb:

    High-level thinking: Using Python for rapid verification of VHDL and Verilog designs

    What will be interesting to watch here is how the dynamics of open source and the popularity and productivity of Python fare versus the existing field of HDL choices in verification tools. What do you think about the concept of Cocotb?