You are currently viewing SemiWiki as a guest which gives you limited access to the site. To view blog comments and experience other SemiWiki features you must be a registered member. Registration is fast, simple, and absolutely free so please, join our community today!

  • Getting the best from MIPI IP Toolbox

    The set of MIPI specifications has severely enlarged during the past year. This is a positive point, as the large set of specifications induces a wider choice, and a chip maker can decide to implement a complex specification to differentiate with competitors, or select a specification just tailored to support a basic architecture and develop a low cost device. Nevertheless, such a wide specification list can be perceived as a burden for an IP vendor. When I make investment decision and build next year development planning, how to prioritize within this large specification set? The below picture could help, but I will also have to take into account that the success of MIPI has allowed the pervasion of MIPI specifications out of the Cellphone, Smartphone and Tablet application, like in consumer (gaming, digital home), PC peripheral (HE Printers), or even in video conferencing or gesture recognition!



    Selecting the next MIPI specification where to invest engineering resources is not an easy task, so I can try to capitalize on the current market status. That I know for sure is that MIPI DSI and CSI-2, Display and Camera specifications going with D-PHY, have been widely adopted (not for 100% of cell phones, but really close to 100%). The next generation, MIPI CSI-3 and DSI-2, will be implemented with M-PHY, so developing M-PHY should make sense… (Such a decision has probably been taken in 2011/2012). That was probably the reason why IP vendors being leaders on MIPI IP market had MIPI M-PHY on 28nm in their port-folio last year, and have enjoyed strong sales of M-PHY… to support UFS, Universal Flash specification commonly developed by the MIPI Alliance and JEDEC!



    If you look at the above picture, built by Synopsys from the original MIPI Alliance picture, you can clearly see where MIPI M-PHY could be implemented (thanks for the simplification made to the original picture). And you also understand why it was a wise decision to invest into M-PHY one or two years ago. Let’s see what are the functional specifications associated with the M-PHY (agnostic by nature):


    • DigRF v4 is the specification allowing interfacing with RF chips (supporting LTE), can be connected directly to the M-PHY.
    • Low Latency Interface (LLI) can also be connected directly to the M-PHY.
    • CSI-3, the Camera Interface, has to be connected through UniPro, an “agnostic” controller, to the M-PHY
    • DSI-2, the Display Interface, connect to the M-PHY also through UniPro
    • As well does Universal Flash Storage (UFS), a specification jointly developed by JEDEC and MIPI, to support external Flash devices (Card)
    • USB 3.0 SSIC jointly developed with USB-IF, allowing to connect two USB 3.0 compatible devices, directly on a board (no USB cable)
    • M-PCIe jointly developed with PCI-SIG, allowing to support PCI Express protocol


    In fact, Synopsys has already enjoyed good sales of M-PHY IP in the past, in partnership with Arteris who developed the Low Latency Interface (LLI) MIPI specification. But the real growth of MIPI M-PHY IP sales during 2013 can be associated with the fast adoption of UFS. Synopsys can propose an integrated solution, offering UniPro support, as well the support of most of the above mentioned controller (digital) specifications.




    The company is continuously investing, and has launched MIPI M-PHY Gear 3 (running at 6 Gbps) A/B along with Type-I and Type-II low-speed capabilities. “The M-PHY’s modular architecture allows implementation of a variety of transmitter and receiver lanes to meet a broad range of applications and all modes outlined in the protocol specification. A sophisticated clock recovery mechanism and power efficient clock circuitry are designed to guarantee the integrity of the clocks and signals required to meet strict timing requirements. The DesignWare MIPI M-PHY supports large and small amplitudes, slew rate control and dithering functionality for optimized electromagnetic interference (EMI) performance.” Said Hezi Saar, and by the way, I would like to thanks Hezi for the fruitful discussion we had yesterday, and also credit him for the “ToolBox” denomination for the set of MIPI specification: he was the first to mention it during the discussion, even if I had it in mind just before the talk.

    You still can attend to the MIPI M-PHY Gear 3 Webinar, here



    Hezi Saar, Product Marketing Manager for DesignWare MIPI IP, Synopsys
    Hezi Saar serves as a staff product marketing manager at Synopsys and is responsible for its DesignWare® MIPI controller and PHY IP product line.

    As a conclusion, I would remind that the undisputed leader of the MIPI IP market is Synopsys, since 2011, and I wait for the 2013 IP revenue data. Not to check if Synopsys is still the leader (no doubt about it), but to see the revenue growth rate. Will it be 50%? MIPI IP market is so healthy that it could even be up to 100%! I remember, back in 2011, when I have written the first “MIPI IP Survey”, predicting that MIPI IP should generate revenue as high as $70 million in 2017… and the feedback I had when I was sharing this data with certain people. They just thought I was, at best, over optimistic (if not crazy)… Today, I am still on this trend, and I think that we can expect this IP market to grow with a 20% CAGR during the next four years.

    Eric Esteve – See “MIPI IP Survey & Forecast” from IPNEST




    More Articles by Eric Esteve .....