I came across this press release of Coventor about their MEMS+ 4.0 software release and then got an opportunity talking to their V.P. of Engineering, Dr. Steve Breit. It was a great conversation with Dr. Breit who provided a lot of insight about how MEMS+ 4.0 changes the whole paradigm for co-designing MEMS and ICs and makes it the most efficient way to design and verify them together.
The Conversation –
Q: It’s interesting to see the MEMS and IC Co-design and verification environment provided by MEMS+ 4.0. How efficient it is? What’s new?
[MEMS+IC Co-design and Verification Environment]
MEMS are modeled in 3D with multiple variables such as geometry, motion, pressure, temperature and so on. The current industry practice is to use models that are handcrafted and simplified to a large extent. On the other hand, conventional finite-element analysis (FEA) is used which is too time consuming. Overall, it leads to several build and test cycles without taking into account full coupling effects and extremely slow turn-around affecting time-to-market. In MEMS+ 4.0, MEMS components can be designed in a 3D design entry system by choosing elements (building blocks) from a library. The models can then be imported as symbols into the MathWorks (MATLAB, Simulink) and Cadence (Virtuoso) schematic environments. What’s new for MEMS+ 4.0 is that the MEMS models can also be automatically exported in Verilog-A, which can then be simulated together with IC description in any environment that supports Verilog-A; Cadence (Virtuoso) or other AMS simulators. These models simulate extremely fast; up to 100X faster than full MEMS+ models. By automating hand-off between MEMS and IC designers, this approach can eliminate design errors and thereby require fewer build-test cycles.
Q: You say that MEMS+ 4.0 platform provides tunable accuracy-versus-speed. How does that work?
Yes, the tool provides option to choose one or two or as many required non linear variables including temperature, pressure, electrostatic parameters etc. to simulate against them. By choosing fewer important variables, the simulation speed can be faster. Other variables can be added as per need. This procedure provides a good tradeoff between accuracy and speed, hence optimizing the overall scenario. Of course simulating with full MEMS+ models is still useful in analyzing corner cases.
Q: What are Reduced Order Models? How do they help?
In MEMS, there is large number of degrees of freedom (i.e. unknowns) ranging from several 100s to 1000s. To make it practical and reasonable, Reduced Order Models (ROMs) are used that reduce the degrees to freedom to say, about 10. For example, in a microphone, barometric and acoustic effects would be important. With ROMs in Verilog-A, simulation speed is increased to large extent, as good as handcrafted Verilog-A, and with multiple degrees of freedom.
Q: How does that look like, a real life model exposed to environmental parameters and being simulated through these Verilog-A models?
MEMS+ has a library of parametric High-Order Finite Elements that includes mechanical components along with electro-mechanical coupling through electrodes and piezo layers, fluid damping and loading, gas damping and others. Fast transient simulations are performed on complete models. Below is an example of gyroscope model simulated for its drive amplitude and sense output.
Q: In MEMS+ 4.0, capacity of the platform has been increased to 64bit. Is it to do with the design size or more compute space required for the design complexity?
It’s for both. The size of the designs is increasing, as well as more compute space is required for higher accuracy. With 64bit, more detailed models can be generated.
It was an interesting discussion for learning about the benefits of MEMS+ models over traditional FEA and how the MEMS+ 4.0 platform enables a faster design closure with its automatic Verilog-A export that can be simulated (with reasonable required accuracy) with any of the industry standard AMS simulator that takes Verilog-A as input. Another advantage with export as Verilog-A in the world of SoCs and IPs is that the MEMS IP is reasonably protected. Happy designing!!
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