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  • A Brief History of Tensilica

    Article: 65nm to 45nm SerDes IP Migration Success Story-tensilica-logo.gifIn the late 1990s, a change was going on in chip design. Companies had moved to system-on-chip design, which incorporated a general-purpose control processor plus blocks of logic (often called RTL) to do the hard tasks that the general-purpose processor couldn’t handle.

    These blocks of logic were becoming a huge problem because of two major reasons:

    1. They took a long time to design and even longer to verify that they worked properly. If they didn’t, the chip would have to be re-designed at huge expense.
    2. They were inherently fixed-function blocks and couldn’t be programmed as standards or functions changed. When something changed, they had to be redesigned – another lengthy, costly process. And equipment already out in the field would be totally out of date.

    Article: 65nm to 45nm SerDes IP Migration Success Story-rowen_cto.jpgChris Rowen, Tensilica’s founder, lived this challenge. As one of the founding employees of MIPS, he understood the challenges of designing a one-size-fits-all 32-bit RISC processor. He worked with MIPS’ customers, and understood their challenges designing hardware off-load logic blocks to do the work the processors couldn’t handle. And, as Sr. VP of the Design Re-use Business Unit at Synopsys, he understood the IP licensing business and the types of IP available to customers.

    Nothing like what Tensilica was inventing was available before. A couple of companies had experimented with opening their 32-bit RISC processor architecture to designers, but the designers had to figure out how to modify the processor themselves and then verify that the changes they made were correct. Then they had to modify all of the software tools to take advantage of the changes they had made in the processor. Only heavily trained processor designers and really good software teams could tackle this task.

    If a lot of these blocks of logic were going to be processor based for programmability, the entire way of designing these blocks and processors was going to have to change.

    So Tensilica started to develop an automated process for the development of new processor cores optimized to the intended application so they could take the place of these logic blocks. Tensilica started with a new, efficient 32-bit processor architecture as a base for all of their products, and then developed tools that would let companies optimize this architecture for their own needs.

    Tensilica has invested heavily in this fundamental technology, which also automates the creation of matching software tools that comprehend all customizations made to the processor cores. They guarantee that each core is automatically verified, cutting months off the verification cycle. They’ve been able to take the time to design a new processor core or block or logic down from 18-24 months to as little as a few hours. (To be honest, most of Tensilica’s customers take a few months just to take advantage of all of the optimizations possible – but it still significantly cut the design time and, more importantly, the verification time.)

    By customizing the processor, designers get a unique, one-of-a-kind core, complete with matching tool chain. So when they use it in a product, it can't be easily copied. This is not a jelly bean processor core – it is part of a company’s intellectual property.

    Processors generated with Tensilica’s technology are used in everything from multi-million dollar central office routers to the latest smartphones. Tensilica’s processors are used for control, digital signal processing (DSP) and dataplane processing – anywhere lots of data needs to be processed quickly and efficiently.

    Tensilica has become the recognized leader in customizable dataplane processors. Dataplane Processor Units (DPUs) consist of performance intensive DSP (audio, video, imaging, and baseband signal processing) and embedded RISC processing functions (security, networking, and deeply embedded control). The automated design tools behind all of Tensilica’s application specific processor cores enable rapid customization to meet specific data plane performance targets.

    Huge companies have invested in Tensilica’s technology. Some of these companies even invested in Tensilica. Others have signed multi-million dollar contracts for Tensilica technology. Tensilica’s DSPs and processors power top tier semiconductor companies, innovative start-ups, and system OEMs for high-volume products including mobile phones, consumer electronics devices (including portable media players, digital TV, and broadband set top boxes), computers, and storage, networking and communications equipment.

    Take a look at the customer profiles page on the new Tensilica website. Almost 200 licensees with more than 2 billion cores shipped? The question is: when will Tensilica IPO? The answer will come next year I'm thinking.




    Article: 65nm to 45nm SerDes IP Migration Success Story-20nm_1000x120.gif