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Digital IC Flow Wiki

A Complete Mixed-Signal Solution. The Price Performance Leader.
Tanner EDA offers a complete analog and digital IC design environment supporting analog, mixed-signal, or MEMS domains in one highly-integrated end-to-end flow. Engineers can perform top-down mixed-signal simulation or co-simulation, synthesis with DFT support, place and route, high-speed “sign-off ready” timing analysis to tape-out from within one unified flow. Tanner EDA is the price performance industry leader, providing a complete mixed-signal tool suite at the lowest Total Cost of Ownership (TCO) in the industry. Tanner EDA’s design environment is a “custom-flow” that lets you plug-in your own processes, standard tools and components offering ultimate flexibility and configurability.

Features
  1. OpenAccess, LEF/DEF, Liberty™ and SDF support
  2. Top-down mixed-signal co-simulation
  3. Simulate combined netlists: behavioral models, block level RTL/gate and transistor level blocks
  4. Debugging and support of advanced verification with Verilog®, SystemC and System Verilog; and VHDL/Verilog design rule checking use general files provided by the foundry
  5. Proven, compatible synthesis with DFT support
  6. Efficient place and route for mixed-signal design
  7. High-speed timing analysis
  8. Hierarchical Design Rule Checking (DRC) and netlist extraction with Calibre® compatibility
  9. All-angle DRC with interactive and real-time DRC
  10. Foundry proven: RTL to GDSII, foundry process and PDK support


Benefits
  1. A complete analog and digital IC design environment supporting analog, mixed-signal, or MEMS domains in one highly-integrated end-to-end flow
  2. Ease of use: Intuitive and quick learning curve
  3. Platform independence on Windows® or Linux®
  4. Foundry or proven: RTL to GDSII, foundry process and PDK support
  5. Lowest Total Cost of Ownership (TCO) in the industry
  6. Single path support: Excellent customer support



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