Helic is an EDA specialist developing innovative and disruptive design automation technologies for the semiconductor market. Founded in May 2000, the company is backed by strategic and venture capital investors. Helic reaches its customers with a comprehensive offering combining EDA tools, IP and services, with a mission to enable first-pass silicon while greatly shortening the development cycles of chips for wireless communications, broadband networking, PCs, tablets and other segments.
Helic's background technology is a unique high-speed parasitics extraction methodology. It was conceived to address a critical missing link in custom IC design flows and accelerate the development of complex RFICs and systems-in-package by enabling rapid, whole-chip electromagnetic modeling early in the design flow. The technology has been in use since 2000 by fabless companies and silicon IDMs worldwide.
Combining specialized EDA tooling with breakthrough IP Helic is helping its customers develop first-time-right silicon, slash their development costs and reduce their time to market. Our technologies are particularly well suited for demanding high-speed designs, multi-band transceivers and high-frequency front-ends, especially where high performance, low power and low cost are the driving requirements.
Helic develops and provides EDA technology that enables rapid
electromagnetic synthesis and modeling of on-chip passive devices
, high-frequency interconnects
s and package parasitics
. At the core of Helic's technology, an ultra-fast RLCK modeling engine offers signoff accuracy comparable to full-wave EM simulators, while outperforming the fastest reported EM engines by 100x or more
in terms of speed and capacity. Helic has made significant advances in the development of efficient design flows that help designers overcome some known obstacles in the development of high-performance RF and high-frequency ICs.
Helic's tool flows help fabless semiconductor and IDM customers achieve:
- Minimization of silicon real estate employed by on-chip inductors and passives.
- Centering of challenging high-speed circuits such as wideband amplifiers and oscillators.
- Rapid simulation of signal integrity aspects such as inductance- and package-loaded transient response.
- Concurrent low-noise/low-power RF circuit optimization, based on the synthesis of passive devices.