I spend a lot of my time working with scan diagnosis, an electrical fault isolation technique applicable to the random logic in a design. The counterpart to scan diagnosis in SRAMs/DRAMs is memory bitmap analysis. Because of the highly regular structures in the memories, people use the shape of failing bits to try and build categories for different types of defects. For example, an under-etched contact can cause a double-vertical bit fail . There was also a really nice paper at ASMC this year by the super-nice, super-awesome Ruth Farrugia that detailed how yield learning can be improved by combining bit-level analysis as well as memory-level analysis to enhance yield learning. In  the year before, the authors broke out signatures of the MARCH algorithm as a way of further classifying single bit fails. In , the authors supplemented machine learning techniques to traditional bitmap classification to improve the accuracy of the classification engine. Anyhoo, I think all of this is great but my question is: Why isn't there more? At the International Test Conference, VLSI Test Symposium, European Test Symposium, etc. there are tons of scan diagnosis papers every year. Since bitmap classification is scan diagnosis' older sibling shouldn't there be more papers? Do people still use bitmap classification? Is it just so mature now that it doesn't require further innovation or is it because it's so simple it doesn't require any innovation? I don't get it and I'm hoping somebody has an opinion...
 Baltagi, Y.; et. all; , "Embedded memory fail analysis for production yield enhancement," Advanced Semiconductor Manufacturing Conference (ASMC), 2011 22nd Annual IEEE/SEMI , vol., no., pp.1-5, 16-18 May 2011.
 Farrugia, Ruth; et. all; , "A memory volume diagnostics methodology to facilitate production yield learning with embedded memories," Advanced Semiconductor Manufacturing Conference (ASMC), 2012 23rd Annual SEMI , vol., no., pp.388-393, 15-17 May 2012.
 Li, Jianbo; et. all; , "A Hybrid Flow for Memory Failure Bitmap Classification,", IEEE North Atlantic Test Workshop, 2012.