Using Mentor EDA tools for IC Design? New Foundry site.

[daniel_payne]

There's a wealth of info at Mentor's new Foundry site pages: Manufacturing-aware design gives you the competitive edge - Mentor Graphics



Mentor Graphics works closely with every major IC foundry worldwide to provide you with a competitive edge through rapid time to market and first silicon success.

Ensuring High Yield from the Start
Manufacturing variability is the enemy of leading-edge nanometer designs. It degrades the yield, reliability, and performance of your products. You can no longer manage it with simple post-processing fixes. Instead, you need to start eliminating manufacturing variability during place and route.

Playing by the (Design) Rules and Winning the Yield Game
Your job—maximize the performance and reliability of your design. Your challenge—creating the most competitive product that achieves your targeted yield. Where do you start?

Improve Your Competitiveness with Faster Time-to-Mask
Every new technology node brings a growing set of challenges to overcome. Yet technology ramps are not slowing down—just the opposite, they are accelerating under extreme competitive pressure.

Identify Failures with Diagnosis-Driven Yield Analysis
Design, physical verification, DFM, and mask enhancements minimize potential IC failures, and specialized diagnosis tools identify yield-limiting defects during production ramp. With diagnosis-driven yield analysis, you can rapidly narrow down the most likely cause of failures, enabling you to take timely corrective actions in the manufacturing process or changes to the design that impact product yield rates.

[karbapi]

Nice info for me. Thanks Daniel.