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Thread: The International Conference on Engineering of Reconfigurable Systems and Algorithms

  1. #1
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    The International Conference on Engineering of Reconfigurable Systems and Algorithms

    The International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), has been an academic event since 2001, held annually in Las Vegas (July). (for more, visit: ERSA News | The International Conference on Engineering of Reconfigurable Systems and Algorithms )




    ERSA is a part of WORLDCOMP Congress with more than 2000 attendees, covering all topics of computer science, engineering, and applications.

    ERSA-IS (ERSA Industrial Session) brings a new emphasis to the commercial and industrial challenges in preparing commercial applications for systems using reconfigurable technology.

    ERSA-IS focus on challenges, tools, available technologies and opportunities when it comes to developing and supporting applications, both academic and commercial, that involve reconfigurable heterogeneous computing technologies across mobile, embedded, and HPC domains.

    The longer-term aim is to establish an Industrial Session (ERSA-IS) with more than thousand attendees.

    ERSA Scope: All aspects of reconfigurable computing, including classical programmable logic, as well as reconfigurable multiprocessing, multi-core systems, reconfigurable high-performance computing, reconfigurable heterogeneous systems, etc.
    ERSA explores emerging trends and novel ideas in the area of parallel, reconfigurable, high-performance computing architecture, design methods and applications. ERSA is promoting multidisciplinary research and new visionary approaches including bio-inspired architectures, computational biology, physics etc.

    Aims
    • Developing complex, commercial applications is a main trend in all areas of computing technologies. Currently, there is no industrial conference(s) focused on commercial application development for reconfigurable, embedded computing systems.
    • The aim of ERSA-IS is to establish a Reconfigurable Computing Developers Conference to bring together commercial interests in reconfigurable computing involving academic researchers and commercial entrepreneurs from developed countries and emerging market economies.
    • Establish an internet based Journal “ERSA Developers News” and portal to facilitated communication between developers, vendors, and customers. Currently, there are no such journals available in reconfigurable computing area.

    Mission
    • The mission of ERSA-IS is to assemble a coordinated research and commercial meeting held in same location and dates. The goal is to provide a forum for exchange of ideas in a number of research areas that interact with ideas, technologies, and aims of different commercial companies. The internet based “ERSA Developers News” Journal, and portal, make the forum lasting around the year.

    Benefits
    • ERSA-IS with WORLDCOMP brings together more than 2,200 attendees from over 85 countries, being, an excellent place for this joint event.
    • ERSA-IS helps to find and establish new commercial and academic contacts from all over the world. It helps small companies looking for
    o collaborators to work with on their efforts
    o potential customers for their items
    o sources of ideas for new features
    • ERSA-IS reduces the cost for creating individual contacts between different parties, which often involves travelling over long distances, form one continent to another.
    This provides a meaningful return on investment - trading off one or two expensive trips for one trip.
    • Las Vegas, has a reputation for bringing technology oriented businesses together to showcase and has reasonable access from Asia, Europe, South America, and North America

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    It appears there is growing interest in reconfigurable systems in the commercial arena. As FPGA usage becomes more widespread, making reconfigurable IP part of the FPGA offerings will really make this technique mainstream. The availability of partial on the fly reprogrammability of the new Altera Arria V and Cyclone V FPGA along with integration of a hard, dual ARM Cortex-A9 processors will make it a favorite of system architects.

    Best Regards,

    Jim

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    ERSA 2012, types of sessions, call for sponsors

    ERSA 2012, types of sessions, call for sponsors

    In 2012, ERSA emphasise the commercial and industrial challenges in reconfigurable technology:

    "Premier International Gathering for Commercial and Academic Reconfigurable Computing Application Developers"
    The International Conference on Engineering of Reconfigurable Systems and Algorithms-ersa-logo.png
    July 16-19, 2012, Las Vegas, USA


    Visit ERSA Homepage: ERSA News | The International Conference on Engineering of Reconfigurable Systems and Algorithms.

    ERSA will have traditional Academic Part and Industrial or Developers Session.
    Industrial papers are not evaluated from academic point of view, but must have strong technical content.

    ERSA 2012 consist of


    Developers Session consist of


    • Presentations on techniques, tools and resources that are available for commercial use
    • Posters that *can* be promotionally oriented
    • Discussion sessions on challenges facing RC developers (technical challenges; business challenges)
    • Product demonstrations, exhibitions and overviews



    Academic Session consists of

    • Invited sessions and speakers
    • Regular papers
    • Discussion sessions



    Note, each session may have academic and developer’s section; it is most appreciated.

    Deadlines:

    • Submissions of Papers: March 12, 2012
    • Proposals for Sessions: Feb. 14, 2012


    For submission, send you paper in pdf format to sub@ersaconf.org

    For inquiries, contact by email: inf@ersaconf.org

    Call For Sponsors:


    Sponsor ERSA and raise your visibility, and show your support for advancing reconfigurable systems algorithms and systems in both academic and commercial applications!

    ERSA is a part of WORLDCOMP Congress bringing together more than 2,200 attendees from over 85 countries over the world. Companies, participating at ERSA/WORLDCOMP, get their products and organizations in front of this huge number of attendees and countries.

    This something that is very expensive to do any other way. It provides a meaningful return on investment (or cost savings) that companies can evaluate - trading off one or two expensive trips for one trip and sponsorship of ERSA-IS at WORLDCOMP.

    Companies may host half or full day seminars to introduce and demonstrate their new technologies and products.

    For sponsorship details, visit: Sponsorship Levels




    For Posts and Proposals:


    Leave your post here at SemiWiki

    If you have any proposals and/or comments, please make these on “ERSA Registration & Proposals for ERSA-IS” page at: ERSA-IS Registration

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    Last edited by Toomas; 01-23-2012 at 06:29 AM.
     

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    Call for Seminars

    Companies are called to host half or full day seminars to introduce and demonstrate their new technologies and products.
    ERSA'12 Conference Homepage

    ERSA at Las Vegas is an excellent place to arrange different seminars to introduce your products and technologies. ERSA runs four consecutive days together with WorldComp Congress and brings together more than 2000 attendees.

    If you are interested in, contact with ERSA org committee by email: org@ersaconf.org or submit your proposal at ERSA Registration and Proposals page ERSA-IS Registration .

    You can also propose sessions, demos, exhibitions, etc.



    ERSA-IS Hot Topic:

    “Reconfigurable Computing Application Development for Heterogeneous Run-time Environments”

    Focus on challenges, tools, available technologies, and opportunities when it comes to developing and supporting applications.

    ERSA-IS Proposed Featured Sessions:

    • Developing heterogeneous systems (CPU plus FPGA) using the OpenCL standard
    • Developing IP cores and scalable libraries for heterogeneous systems
    • Hardware security and trust in reconfigurable heterogeneous systems



    We strongly encourage companies, developers, entrepreneurs to arrange seminars, demos, exhibitions, talks, presentations etc., and to be sponsors for ERSA-IS. We strongly encourage employers, developers, students, and researchers to attend.

    Sponsor ERSA and raise your visibility, and show your support for advancing reconfigurable systems algorithms and systems in both academic and commercial applications!

    For sponsorship details, visit: Sponsorship Levels

    Looking forward to meet you in Las Vegas!

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    Dedicated Sessions: DEADLINE: Feb. 14, 2012

    CALL for Dedicated Sessions

    DEADLINE: Feb. 14, 2012

    ERSA’12 Homepage: ERSA'12 Conference Homepage

    Dedicated Sessions

    Dedicated sessions consist of invited papers and regular papers. You can choose the topic of your session. For more details, contact the conference chair Toomas Plaks by email: org@ersaconf.org

    You can also make proposals for tutorials, discussion sessions, and seminars.


    Proposals for sessions must include:

    Brief description of the session


    1. Title of the Specialized Sessions
    2. An introduction, a list of topics/scope of the technical session, the novelty, and the importance to the ERSA audience.
    3. A short biography of the Specialized Sessions organizers (up to three persons).


    List of contributors


    1. A list of possible contributors, including titles, authors, contact information of the corresponding authors, and a short abstract of each contribution.
    2. A list of Invited Talks and Authors, including tentative titles, short abstracts, and Bios with contact information
    3. Technical session should not include more than one overview paper.
    4. Organisers should not contribute more than one paper.




    Proposed Featured Industrial Sessions:


    • Developing heterogeneous systems (CPU plus FPGA) using the OpenCL standard
    • Developing IP cores and scalable libraries for heterogeneous systems
    • Hardware security and trust in reconfigurable heterogeneous systems


    Proposed Dedicated Industrial Sections

    1. "R/A/M in Finance"
    Reconfigurable / Adaptive / Multicore Computing in Finance and Banking
    Chair: Steven Guccione, VP Senior Technology Manager, Bank of America


    Note, each session may have academic and developer’s sections; it is most appreciated.


    Hot Topics for Academic Session


    • Formal Methods and Engineering: Tools and Theory of Design Methods
    • Reconfigurable and Evolvable Hardware Architectures: Bio-Inspired, Low-Power, Multi-Core, Achronix, NuFPGA, etc.
    • Security: Threats and Solutions for Reconfigurable Embedded Systems


    Academic Session consists of


    • Invited sessions and speakers
    • Regular papers
    • Discussion sessions




    Proposed Dedicated Academic Sections

    1. “Self-Organizing Reconfigurable Embedded Systems”

    Chair: Prof. Christophe Bobda: University of Arkansas, USA
    Co-Chair: Prof. Achim Rettberg: University of Oldenburg, Germany
    Co-Chair: Dr. Ali Ahmadinia, Glasgow Caledonian University, UK

    Sponsor ERSA and raise your visibility, and show your support for advancing reconfigurable systems and algorithms, and systems in both academic and commercial applications!

    For sponsorship details, visit: Sponsorship Levels

    Looking forward to meet you in Las Vegas!

    For all inquiries contact: inf@ersaconf.org

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    Proposals

    Quote Originally Posted by Toomas View Post
    CALL for Dedicated Sessions

    DEADLINE: Feb. 14, 2012

    ERSA’12 Homepage: ERSA'12 Conference Homepage

    Dedicated Sessions

    Dedicated sessions consist of invited papers and regular papers. You can choose the topic of your session. For more details, contact the conference chair Toomas Plaks by email: org@ersaconf.org

    You can also make proposals for tutorials, discussion sessions, and seminars.


    Proposals for sessions must include:

    Brief description of the session


    1. Title of the Specialized Sessions
    2. An introduction, a list of topics/scope of the technical session, the novelty, and the importance to the ERSA audience.
    3. A short biography of the Specialized Sessions organizers (up to three persons).


    List of contributors


    1. A list of possible contributors, including titles, authors, contact information of the corresponding authors, and a short abstract of each contribution.
    2. A list of Invited Talks and Authors, including tentative titles, short abstracts, and Bios with contact information
    3. Technical session should not include more than one overview paper.
    4. Organisers should not contribute more than one paper.




    Proposed Featured Industrial Sessions:


    • Developing heterogeneous systems (CPU plus FPGA) using the OpenCL standard
    • Developing IP cores and scalable libraries for heterogeneous systems
    • Hardware security and trust in reconfigurable heterogeneous systems


    Proposed Dedicated Industrial Sections

    1. "R/A/M in Finance"
    Reconfigurable / Adaptive / Multicore Computing in Finance and Banking
    Chair: Steven Guccione, VP Senior Technology Manager, Bank of America


    Note, each session may have academic and developer’s sections; it is most appreciated.


    Hot Topics for Academic Session


    • Formal Methods and Engineering: Tools and Theory of Design Methods
    • Reconfigurable and Evolvable Hardware Architectures: Bio-Inspired, Low-Power, Multi-Core, Achronix, NuFPGA, etc.
    • Security: Threats and Solutions for Reconfigurable Embedded Systems


    Academic Session consists of


    • Invited sessions and speakers
    • Regular papers
    • Discussion sessions




    Proposed Dedicated Academic Sections

    1. “Self-Organizing Reconfigurable Embedded Systems”

    Chair: Prof. Christophe Bobda: University of Arkansas, USA
    Co-Chair: Prof. Achim Rettberg: University of Oldenburg, Germany
    Co-Chair: Dr. Ali Ahmadinia, Glasgow Caledonian University, UK

    Sponsor ERSA and raise your visibility, and show your support for advancing reconfigurable systems and algorithms, and systems in both academic and commercial applications!

    For sponsorship details, visit: Sponsorship Levels

    Looking forward to meet you in Las Vegas!

    For all inquiries contact: inf@ersaconf.org

    We have received currently seven proposals for dedicated sessions.
    If you are planning to submit your proposal, we advise you to connect first with ERSA (inf@ersaconf.org) and show the draft, many proposals should be improved to be accepted.

    Deadline: Feb. 14, 2012

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    Engineering Mathematics

    Last year, ERSA Keynote speaker, Prof David Lorge Parnas, presented a talk:
    “How Engineering Mathematics can Improve Software”. The main content of his talk can be summarised as (visit ERSA News | The International Conference on Engineering of Reconfigurable Systems and Algorithms ):

    “For many decades computer science researchers have promised that the "Formal Methods" developed by computer scientists would bring about a drastic improvement in the quality and cost of software. That improvement has not materialized. We review the reasons for this failure ... the difference between the notations that are used in formal methods and the mathematics that is essential in other areas of Engineering.“

    Can anyone tell us how formal methods can benefit circuit design? In SemiWiki thread “The Problems with SoC IP Integration”, there simguru stated:

    “…if you could publish behavioral models that do the same job and have some verification (of usage) built-in and a "black box" layout.”

    Sure, but how to build these models, we have to use math obviously, should we use formal methods. Industry is not very keen to use formal methods; contrarily, to be a computer scientist in university and not being a fan of formal methods, it is not very healthy.

    Alex Berka (Isynchronise) wrote:
    “What kind of logics are suited for parallel forms of deduction? How might one use novel environments and models of computation, for establishing a closer link between mathematics and computer science? What are more efficient language systems and architectures for high performance computing?

    For more read the following:

    Visit LinkedIn group Synchronic Computation.

    What is wrong in “computer” related theories? We don’t like Von Neumann bottleneck, multi-core approach has not been made to work, etc. There are many cases where we feel that our models do not work in way we want.

    Should we open a discussion here and continue it at ERSA, where we can meet face-by-face?

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  8. #8
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    Compared with other disciplines, CS is prone to the formation of competing cults that promote a silver bullet solution to problem areas. I think this has something to do with the fact that the standard models (Turing Machine and Lambda Calculus) do not support high level computation well. I have seen academics evangelise formal methods, object orientation, functional programming, logic programming, agent based programming, and various other approaches as the best and only way of programming.

    I like this work because Professor Parnas has the courage to do some finger pointing at emperor’s new clothes, and also because it involves cross fertilisation of concepts between software and other forms of engineering. He is right in pointing out that formal methods are perceived as difficult and are not popular in industry, and that should be cause for suspicion. Parnas is suggesting a programming methodology based on his tabular expressions, that makes it easier for the average programmer to deliver reliable software, compared with formal methods. I am inclined to agree with him, but not with the suggestion that formal methods are wrong because they are not engineering mathematics. This suggests that the latter is as effective as any methodology can be expected to be for developing software.

    My work touches on the above in that I developed a formal machine and spatially oriented language model that is oriented to reconfigurable computing. In the future I would like to develop (yet another) programming methodology, based on converging mathematical and computer formalisms on the spatial language model, see the links Toomas mentioned.

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    In general, I agree with alexberka.

    However, I do not think that the problem with formal methods is that “CS is prone to the formation of competing cults that promote a silver bullet solution to problem areas”. If so, we have to see a battle of giants, as we see a battle on a market of mobile devices, where all giants, Apple, Google, Samsung, Microsoft, and Nokia are heavily battling. The reason for failure is that formal methods haven’t provided reasonable results to take these methods to use in industry.

    Secondly, this is not a reason for failure that formal methods are difficult. To increase the bandwidth of communication channels requires perfect knowledge in signal processing, physics, and maths, and this all together is more difficult than formal methods. Thus, if industry feels that they can really be benefited from formal methods, then they take it into use.

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  10. #10
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    In the academic arena, there is considerable competition for the programming approach that dominates a department’s research agenda. Apologies if I gave the wrong impression. I was not suggesting that formal methods not having provided reasonable results was due to the approach being a cult, merely alluding to over-enthusiasm and lack of detachment that well funded research movements can acquire.

    Ideally, the programming of reconfigurable devices should not require expertise in electronic engineering, physics and maths. IMHO, we should be looking for new language models that are oriented to reconfigurable computing.

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    Last edited by alexberka; 02-17-2012 at 04:47 AM.
     

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    CALL for Papers and Industrial Sessions

    CALL for Papers and Industrial Sessions

    DEADLINE: March 12, 2012

    ERSA’12 Homepage: ERSA'12 Conference Homepage

    SUBMISSION of PAPERS

    Prospective authors are invited to submit an electronic copy of a full academic or industrial paper to:

    ACADEMIC TRACK: reviewed and evaluated for academic content and contribution. Submitted papers must be original, unpublished work, not currently submitted for publication or for consideration elsewhere. ERSA Conference Academic track does not accept submissions of overview papers.

    INDUSTRIAL TRACT: reviewed and evaluated for strong industrial/technical content and contribution

    NOTE: Industrial track is not a back door for accepting weak academic papers

    Submit a full paper, formatted as IEEE two-column transaction paper in PDF to sub@ersaconf.org

    Regular paper: 7 pages; short paper: 4 pages; poster: 2 pages

    Paper must be submitted with cover letter


    For more details, visit: ERSA’11 Submission | The International Conference on Engineering of Reconfigurable Systems and Algorithms and go for: "Submission of Papers".

    Proposed Featured Industrial Sessions:

    • Developing heterogeneous systems (CPU plus FPGA) using the OpenCL standard
    • Developing IP cores and scalable libraries for heterogeneous systems
    • Hardware security and trust in reconfigurable heterogeneous systems


    Proposed Dedicated Industrial Sections

    • "R/A/M in Finance: Reconfigurable / Adaptive / Multicore Computing in Finance and Banking”
      Chair: Steven Guccione, VP Senior Technology Manager, Bank of America


    Note, each session may have academic and developer’s sections; it is most appreciated.

    Hot Topics for Academic Session
    • Formal Methods and Engineering: Tools and Theory of Design Methods
    • Reconfigurable and Evolvable Hardware Architectures: Bio-Inspired, Low-Power, Multi-Core, Achronix, NuFPGA, etc.
    • Security: Threats and Solutions for Reconfigurable Embedded Systems


    Proposed Dedicated Academic Sections

    1. “Self-Organizing Reconfigurable Embedded Systems”
      Chair:
      Prof. Christophe Bobda: University of Arkansas, USA
      Co-Chair:
      Prof. Achim Rettberg: University of Oldenburg, Germany
      Co-Chair: Dr. Ali Ahmadinia, Glasgow Caledonian University, UK
    2. “FPGA architectures for safety-related applications in transport, i.e. automotive, avionics and space”
      Chair:
      Prof. Dr.-Ing. Mladen Berekovic, Technische Universität Carolo-Wilhelmina zu Braunschweig, Germany
    3. TBA


    Submission of proposals for Industrial Sessions is open after March 12, 2012

    Sponsor ERSA and raise your visibility, and show your support for advancing reconfigurable systems and algorithms, and systems in both academic and commercial applications!

    For sponsorship details, visit: Sponsorship Levels

    Looking forward to meet you in Las Vegas!

    For all inquiries contact: inf@ersaconf.org

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    DEADLINES

    Important Note:

    DEADLINES


    • Deadline for academic papers: March 12, 2012
    • Deadline for industrial papers: April 1, 2012


    Contact for inquiries: inf@ersaconf.org

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    Call for Sponsorship

    Call for Sponsorship

    The information age continues to surprise and challenge us all in the fast pace of evolving technology. Whether it be in health information, mobile devices, sensor grids, business analytics, cybersecurity or scientific research, the new applications of computing technology continue to amaze with the possibilities. Reconfigurable computing is no exception to these changing times, and we are reaching out to seek your support and sponsorship for the Engineering Reconfigurable Systems and Algorithms (ERSA, ersaconf.org/ersa-news) conference held annually in July as part of the international WorldComp conferences.

    Previously an academically oriented conference, staring from this year ERSA incorporates a new emphasis, adding the critical dimension of commercial applications and development to its program; it is ERSA Industrial Session, ERSA-IS. As opportunities for reconfigurable technology continues to evolve, with it be advances in FPGA technology, opportunities for low-power hybrid mobile computing, or challenges for ultra-efficient exascale computing, the need is now more than ever for a conference that bridges both leading-edge thinking with practical application.

    ERSA brings together the range of stakeholders key to successful research, development and commercialization of reconfigurable technologies. Working closely with OpenFPGA, ERSA is developing a broad and sustaining international base of support for translation of reconfigurable innovation to commercial return on investment. Supporters and sponsors of ERSA will see benefits through:

    Added visibility of products and advances
    – Sponsors have the opportunity to speak directly with those most interested in using their technologies. Through advance publicity, visibility of the company is raised significantly in the reconfigurable, heterogeneous (CPU plus FPGA), embedded, high-performance systems market on a global scale.

    Lead positions in shaping the future
    - At higher levels of commitment, sponsors have the opportunity to secure key positions to help guide the future of the ERSA conference. Your commitment also helps to confirm reconfigurable computing as a technology for the future.

    Enhanced competitive positioning
    - As part of WorldComp and the attraction of several thousand thought leaders from across the globe, sponsorship in ERSA provides a significant edge in positioning an organization for business in emerging markets.
    We are asking for your support through participation and commitment through sponsorship of ERSA in any of several levels summarized at the end of this letter. Your sponsorship of ERSA is not only appreciated, but is key to the continued growth of the reconfigurable, heterogeneous computing industry sector as the true value of highly-efficient computing continues to enlighten new opportunities.

    ERSA and ERSA-IS Sponsorship Level Details

    Bronze Level ($2,500)
    Silver Level ($5,000)
    Gold Level ($10,000)
    Platinum Level ($20,000)
    Super Platinum Level Available

    Full sponsorship details on all levels available at ersaconf.org/ersa-news/sponsorship-levels.php
    For more information, contact Dr. Toomas Plaks at org@ersaconf.org

    Also available is Vital Statistics for ERSA and WorldComp at
    ersaconf.org/ersa-news/


    With kindest regards,

    Toomas Plaks,
    Founder, ERSA Chair

    Daniel Nenni
    ERSA Industrial Co-Chair,
    Founder, The Semiconductor Wiki Project

    Eric Stahlberg
    Member ERSA Industrial Board
    President, OpenFPGA

    Steven Guccione,
    Member ERSA Industrial Board
    Technology Manager, Bank of America, USA

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    Deadline extension

    New extended deadlines:

    Academic papers: March 26, 2012
    Industrial papers: April 23, 2012

    For more, visit ERSA2012 web-site at ERSA'12 Conference Homepage

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    Few days of deadline extension for academic papers is granted. Contact the chair.

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    ERSA Programme ...

    ERSA'2012 Programme starts to take shape

    We will post here most important talks, sessions, demo etc.

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    Altera and OpenCL

    Altera will participate and will showcase the OpenCL product

    “Developing heterogeneous systems (CPU plus FPGA) using the OpenCL standard”


    Altera Corporation has announced a development program focused on the Open Computing Language (OpenCL™) standard for FPGAs and SoC FPGAs. Altera's OpenCL program combines the parallel performance capability of FPGAs with the OpenCL standard to enable powerful system acceleration.

    For more, visit ERSA Featured Sessions.

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    Invited Talk: Hardware Support Technology for Smart Grid

    Invited Talk:

    Future Internet Infrastructure and its Hardware Support Technology for Smart Grid

    Hiroaki Nishi Department of System Design, Keio University, Japan.

    This paper proposes a service-oriented communication platform enabling the provision of scalable smart community services. The proposed platform is managed and operated using Extensible Markup Language (XML) that has advantages in terms of flexibility, cost-effective implementation and affinity with databases. In practice, the platform is embedded into distributed communication nodes, e.g. routers, switches and home gateways, and both existing IP services and smart community services are provided over public networks. This platform should provide a lossless data correction for the application of smart grid because it is calculate average or total electric power consumption in order to maintain the stability of a power grid. To achieve the lossless data correction, database insertion architecture was implemented on FPGA and ASIC environment. Moreover, as an application, a building energy management system (BEMS) using the platform is demonstrated. The feasibility of the network architecture with the platform is discussed based on experimental results of data acquisition and control in the BEMS demonstration.

    Hiroaki Nishi received his Ph.D degree from Keio University, and currently he is serving as Associate Professor of Keio University, Japan and Visiting Associate Professor of National Institute of Informatics. He serves as IEEE-SA Japanese ambassador with Mr. Inoue, a member of his laboratory. He joins IEEE P2030 Standards Committee and a member of IEEE-SA ITS & Smart Grid Vision Project. He is also a member of IEEE Industrial Electronics Society (IES) Building Automation Control & Management (BACM) Technical Committee. He organizes Energy and IT special session in IEEE IES Industrial Informatics (INDIN) and Annual Conference of the IEEE IES (IECON) since 2006. He also manages several committee of Japanese ministry. He is conducting a project for a new generation network to achieve network based open innovation with a service oriented router as well as several smart community and smart island projects.

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    Invited Talk: Security Issues of FPGA

    Invited Talk:

    Tackling the Security Issues of FPGA Partial Reconfiguration with Physical Unclonable Function

    Dr. Yohei Hori, National Institute of Advanced Science and Technology, Japan

    Abstract:
    Protecting the confidentiality and integrity of FPGA is of significant concern in electronics markets as FPGAs are coming into common use in the commercial, industrial and other field of products. Since the configuration information of FPGA is just an electronic data stream, it can be easily eavesdropped and tampered on the data bus or network. Such security issues are clearly hindering the use of partial reconfiguration systems, where users can download favorite circuits from the Internet on demand.

    Of course the current high-end FPGAs have cryptographic cores to counteract such security issues, but in 2011, it was reported that the encryption key embedded in the FPGA was successfully extracted by side-channel attack. This success of the attack indicates that, with state-of-the-art techniques, the fixed key in non-volatile memory can be the flaw of the security-sensitive systems.

    To tackle such security issues, Physical Unclonable Functions (PUFs) have been gathering wide attention. Silicon PUF is a circuit to generate a unique ID by using the device variation. The generated ID is to say a volatile secret, and no secret information need to be stored in the device. This talk will first introduce the security issues in the modern LSI markets, and then presents how PUF can solve the problems of FPGA security.

    Bio:
    Yohei Hori is a research scientist at the National Institute of Advanced Industrial Science and Technology (AIST), Japan. He received the PhD (2004) in engineering from the University of Tsukuba, Japan. He spent the first five years after PhD as a postdoctoral researcher in AIST and developed various dynamically reconfigurable systems with FPGAs. He moved to Chuo University as a research scientist in 2009 and worked on the hardware security including side-channel analysis and physical unclonable functions. He moved back to AIST in 2010 and worked as a member of the SASEBO development team, which is the most popular side-channel evaluation board used in more than 30 countries in the world. His current research interest includes the partially reconfigurable systems, side-channel analysis, fault analysis and physical unclonable functions.

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  20. #20
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    Altera Invited talk

    Invited Talk:

    Towards OpenCL Compilation into High-Performance Hardware for FPGAs
    Prof. Stephen Brown, University of Toronto, Canada

    Abstract:

    Today's FPGAs have logic capacities that are steadily increasing. The FPGA is a large array of
    fine-grained programmable elements that can be configured in such a way to efficiently solve
    many complex problems. For many applications, FPGAs are a tremendously efficient computational
    fabric; however, the primary method of design entry for FPGAs is through Hardware Design Languages
    (HDLs) such as VHDL or Verilog. These languages model the FPGA at an extremely low level where the
    programmer is expected to understand cycle-accurate details of how data is moved and transformed
    through the FPGA. While this programming model is required to achieve the highest possible efficiency
    from FPGAs, it is akin to "assembly language" programming for processors. In this talk, we explore
    techniques that allow us to program FPGAs at a level of abstraction that is closer to traditional
    software-centric approaches. These techniques allow us to tradeoff some efficiency for added designer
    productivity. Our language of choice is OpenCL, which is an industry standard parallel language based
    on 'C.' OpenCL offers numerous compelling advantages that enable designers to harness the computational
    power of FPGAs and yet ease the programming burden to a significant extent.

    Bio:
    Stephen Brown is a Professor of Electrical and Computer Engineering at the University of Toronto, where he received his Ph.D. in 1990. He also holds the position of Architect at the Altera Toronto Technology Center, a world-leading research and development site for CAD software and FPGA architectures, where he is involved in research activities and is the Director of the Altera University Program. His research interests include field-programmable VLSI technology, CAD algorithms, and computer architecture. He won the Canadian Natural Sciences and Engineering Research Councils 1992 Doctoral Prize for the best Ph.D. thesis in Canada. He has won multiple awards for excellence in teaching and is a coauthor of more than 85 scientific research papers and three textbooks: Fundamentals of Digital Logic with Verilog Design, Fundamentals of Digital Logic with VHDL Design, and Field-Programmable Gate Arrays.

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    Last edited by Toomas; 06-20-2012 at 05:47 PM.
     

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