Simulation Technique for Thermally Aware 3D TSV IC Stacking

[Kamal Karimanal]

Simulation Technique for Thermally Aware 3D TSV IC Stacking

Join us for a webinar on Aug 22, 2012 at 12:00 PM PDT.
Register now!

https://attendee.gotowebinar.com/reg...77958213443584

Cielution invites you to join this free webinar on WholisticThermal modeling of 3D stacked ICs. Following is the agenda:

• Introduction
• The need for Thermally aware IC design
• Case Study: Implications of hot spots in a 3D stack with interposer and stacked memory
• Validation of Compact Thermal model of the 3D stack
• Results and discussion

Who should attend:Potential customers of Cielution with an interest in 3D enablement challenges.Kindly register with your organization email address (you will not be spammed).Registration from personal email IDs such as gmail & Yahoo accounts willnot be approved unless you are already in one of Cielutions linkedin contactsor Google + circle.

After registering, you will receive a confirmation emailcontaining information about joining the webinar.
View System Requirements

[Kamal Karimanal]

For those who missed this, here is the link to recording:
https://attendee.gotowebinar.com/recording/3021575945383443456

I will greatly appreciate if you could register with your actual name complete the survey after viewing the webinar:
https://attendee.gotowebinar.com/sur...13443584/42384