Demystifying Analog & Mixed-Signal ASICs

[Bob Frostholm]

When considering a new ASIC design, carefully consider the role Analog will play in its deployment. To minimize risk, choose your ASIC development partner carefully.Most of the time, non-critical Mixed-signal ASIC design skills (meaning an ability to cut and paste functional blocks from a cell library) will be sufficient.

For those applications when the Analog performance is critical, you need to minimize your risk. Custom Analog Design is the only way to assure your product's peak performance. Always seek out an Analog ASIC partner with the right Analog design skills and experience to match the application. To help you understand the benefits of a full custom apporach, go to JVD, Inc. : Whitepapers : ASIC Design, Manufacture and Test

[Staf_Verhaegen]

To help you understand the benefits of a full custom apporach, go to JVD, Inc. : Whitepapers : ASIC Design, Manufacture and Test

Interesting but I would say it is a little bit tainted towards analog design importance. Other companies like Triad Semiconductor: Custom ASIC Solutions, On Time, In Budget and State of the Art with their via programmable mixed-signal ASICs claim to be able to standardize much more of the analog design as is currently done and this way can reduce NRE for a lot applications and needs.
Sure, there will always be a case for dedicated analog engineering but I do think analog can bemore standardized in a lot of cases.

greets,
Staf.

[Bob Frostholm]

Hi Staf,>>
> >
Yes, I amtainted toward the analog design importance; for good reason. The single mask programmableanalog array concept was pioneered in the early 70’s by a Sunnyvale companycalled InterDesign who made a chip with basic analog building blocks that wouldthen be custom connected with a metal mask. It was most successful if the clientcompany needed to use most/all of the blocks… otherwise, they pay for unusedsilicon. >>
Clearlythere is a balance between achieving all the performance metrics and the combinatorialeffect of NRE plus unit price that will dictate the best solution. The prevailingmind set is that engineering and tooling costs for an analog ASIC are high,when in fact, they rarely exceed $300K and chip Analog ASIC asp’s usually runabout $1…YMMV>>

[Staf_Verhaegen]

The prevailing mind set is that engineering and tooling costs for an analog ASIC are high,when in fact, they rarely exceed $300K and chip Analog ASIC asp’s usually runabout $1…YMMV>

My interest and focus is for low volume, e.g. only a few hundred or thousand of chips. In that respect 'only' $300K NRE is a lot. But in general the current microelectronics world be it EDA, engineering or foundry support is not targeted for these applications.

[Bob Frostholm]

I can't speak for triad, but I'd be surprised if their business model would support a "few hundred". You are in a difficult position. Here's a rough guideline for Analog ASIC viability vs volume and cost of components being integrated.

Bob

[srao]

Could you indicate the source for the data in this graph? Does the x-axis include only AMS components or AMS, digital, et.al. In either scenario, it seems a bit far-fetched - a $4 BOM driving integration at <60k lifetime units doesn't seem to make much economic sense.

Sreeni